Probabilistic shaping techniques for high performance coherent optical transceivers

Patent metadata

Field	Value
Publication number	US-11190276-B2
Application number	US-202017077755-A
Country	US
Kind code	B2
Filing date	Oct 22, 2020
Priority date	Jan 24, 2018
Publication date	Nov 30, 2021
Grant date	Nov 30, 2021

Abstract

A method and structure for probabilistic shaping and compensation techniques in coherent optical receivers. According to an example, the present invention provides a method and structure for an implementation of distribution matcher encoders and decoders for probabilistic shaping applications. The techniques involved avoid the traditional implementations based on arithmetic coding, which requires intensive multiplication functions. Furthermore, these probabilistic shaping techniques can be used in combination with LDPC codes through reverse concatenation techniques.

First claim

What is claimed is:

1. A transmitter device comprising a distribution matcher encoder module including n encoder function devices coupled in series, the series of n encoder function devices being configured to convert data from a first form (x) to a second form (b), wherein the series of n encoder function devices is configured to:
receive data x, a code length n, and a bits per codeword n′ as inputs;
store the following initial values: a n =x and n n ′=n′;
perform the following actions for i=n−1 to 0
when a first condition characterized by

a

i
+
1

≥

(

i

n

i
+
1

′

-
1

)

or a second condition characterized by n i+1′≤ 0 is satisfied, compute and store the following intermediate values:

a
i

=

a

i
+
1

-

(

i

n

i
+
1

′

-
1

)

,

b i =0, and n i ′=n i+1 , and
when neither the first condition nor the second condition is satisfied, compute and store the following intermediate values: a i =a i+1 , b i =1, and n i ′=n i+1 ′−1; and
output converted data b.

2. The transmitter device of claim 1 , wherein each of the n encoder function devices comprises one or more carry save adders.

3. The transmitter device of claim 1 , further comprising a splitter module electrically coupled to the distribution matcher encoder module and configured to receive data.

4. The transmitter device of claim 3 , further comprising a forward error correction (FEC) encoder module electrically coupled to the splitter module and the distribution matcher encoder module.

5. The transmitter device of claim 4 , further comprising a mapper module electrically coupled to the FEC encoder module.

6. The transmitter device of claim 1 ; wherein the series of n encoder function devices includes a plurality of encoder storage units configured to store the initial values and the intermediate values.

7. The transmitter device of claim 1 , wherein the series of n encoder function devices includes encoder comparison and adder circuits configured to perform the actions for i=n−1 to 0.

8. A transmitter device comprising a distribution matcher encoder module including n encoder function devices coupled in series, the series of n encoder function devices being configured to convert data from a first form (x) to a second form (b) using an encoder lookup table (LUT), wherein the series of n encoder function devices is configured to:
receive data x, a code length n, and a bits per codeword n′ as inputs;
store the following initial values: a n =x and n n ′=n′;
perform the following actions for i=n−1 to 0
when a first condition characterized by a i+1 ≥t i [n i+1′− 1] or a second condition characterized by n i+1 ′≤0 is satisfied, compute and store the following intermediate values: a i =a i+1 −t i [n i+1′− 1], b i =0, and n i ′=n i+1 ′, where t i [n] is the function to access the encoder LUT, and
when neither the first condition nor the second condition is satisfied, compute and store the following intermediate values: a i =a i+1 , b i =1, and n i ′=n i+1 −1; and

output converted data b.

9. The transmitter device of claim 8 , wherein each of the n encoder function devices comprises one or more carry save adders.

10. The transmitter device of claim 8 , further comprising a splitter module electrically coupled to the distribution matcher encoder module and configured to receive data.

11. The transmitter device of claim 10 , further comprising a forward error correction (FEC) encoder module electrically coupled to the splitter module and the distribution matcher encoder module.

12. The transmitter device of claim 11 , further comprising a mapper module electrically coupled to the FEC encoder module.

13. The transmitter device of claim 8 , wherein the series of n encoder function devices includes a plurality of encoder storage units configured to store the initial values and the intermediate values.

14. The transmitter device of claim 8 , wherein the series of n encoder function devices includes encoder comparison and adder circuits configured to perform the actions for i=n−1 to 0.

15. A transmitter device comprising a distribution matcher encoder module including n encoder function devices coupled in series, the series of n encoder function devices being configured to convert data from a first form (x) to a second form (b) using an encoder lookup table (LUT), wherein the series of n encoder function devices is configured to:
receive data x and a code length n as inputs;
store the following initial value: n′=0;
while

(

x
≥

⁢

(

n

n
′

)

)

compute and store the following intermediate value:

x
=

x
-

(

Assignees

• Marvell Asia Pte Ltd

Inventors

• Morero Damian Alfonso
• Castrillon Mario Alejandro
• Lopez Ramiro Rogelio
• Cavenio Cristian
• Infante Gabriel
• Hueda Mario Rafael

Classifications

• H03M7/28

  Programmable structures, i.e. where the code converter contains apparatus which is operator-changeable to modify the conversion process · CPC title

• H04L27/3836

  in which the carrier is recovered using the received modulated signal or the received IF signal, e.g. by detecting a pilot or by frequency multiplication · CPC title

• H03M7/14 Primary

  Conversion to or from non-weighted codes · CPC title

• H04L1/0047

  Decoding adapted to other signal detection operation (in conjunction with sequence estimation or equalization H04L25/03286) · CPC title

• H04L27/34

  Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems · CPC title