Linear photonic processors and related methods

US11169780B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11169780-B2
Application numberUS-202017101415-A
CountryUS
Kind codeB2
Filing dateNov 23, 2020
Priority dateNov 22, 2019
Publication dateNov 9, 2021
Grant dateNov 9, 2021

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Photonic processors are described. The photonic processors described herein are configured to perform matrix-matrix (e.g., matrix-vector) multiplication. Some embodiments relate to photonic processors arranged according to a dual-rail architecture, in which numeric values are encoded in the difference between a pair optical signals (e.g., in the difference between the powers of the optical signals). Relative to other architectures, these photonic processors exhibit increased immunity to noise. Some embodiments relate to photonic processors including modulatable detector-based multipliers. Modulatable detectors are detectors designed so that the photocurrent can be modulated according to an electrical control signal. Photonic processors designed using modulatable detector-based multipliers are significantly more compact than other types of photonic processors.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for performing a mathematical operation comprising: receiving an input optical signal; obtaining a first numeric value and a second numeric value; generating an encoded optical signal by modifying the input optical signal using the first numeric value; generating a photocurrent at least in part by: detecting the encoded optical signal using a modulatable detector, and setting a characteristic of the modulatable detector based on the second value; and obtaining a result of the mathematical operation using the photocurrent. 2. The method of claim 1 , wherein the modulatable detector comprises a photodetector, and wherein setting the characteristic of the modulatable detector based on the second value comprises setting a responsivity of the photodetector based on the second value. 3. The method of claim 1 , wherein obtaining the result comprises obtaining a product of the first numeric value times the second numeric value. 4. The method of claim 1 , wherein the modulatable detector comprises a control capacitor, and wherein setting the characteristic of the modulatable detector comprises setting a voltage applied to the control capacitor. 5. The method of claim 4 , wherein the control capacitor comprises a metal-oxide-semiconductor capacitor (MOS cap), and wherein setting the voltage applied to the control capacitor comprises setting the voltage applied to the MOS cap. 6. The method of claim 1 , wherein generating the encoded optical signal comprises passing the input optical signal through an optical modulator. 7. The method of claim 1 , wherein the modulatable detector comprises a photodetector and a transistor, and wherein setting the characteristic of the modulatable detector comprises setting a voltage applied to the transistor. 8. The method of claim 1 , wherein the modulatable detector comprises a photodetector and a gain stage, and wherein setting the characteristic of the modulatable detector based on the second value comprises setting a current gain of the gain stage based on the second value. 9. A photonic device configured to perform a mathematical operation comprising: an optical encoder; a modulatable detector coupled to an output of the optical encoder; and a controller coupled to both the optical encoder and the modulatable detector, the controller being configured to: obtain a first numeric value and a second numeric value, control the optical encoder to generate an encoded optical signal by modifying an input optical signal using the first numeric value, control the modulatable detector to generate a photocurrent in response to receiving the encoded optical signal, wherein controlling the modulatable detector comprises setting a characteristic of the modulatable detector based on the second numeric value, and obtain a result of the mathematical operation using the photocurrent. 10. The photonic device of claim 9 , wherein the modulatable detector comprises a photodetector, and wherein setting the characteristic of the modulatable detector based on the second value comprises setting a responsivity of the photodetector based on the second value. 11. The photonic device of claim 9 , wherein the modulatable detector comprises a photo-absorption region and a control capacitor positioned adjacent to the photo-absorption region. 12. The photonic device of claim 11 , wherein the control capacitor comprises a metal-oxide-semiconductor capacitor (MOS cap). 13. The photonic device of claim 9 , wherein the modulatable detector comprises: a first photodetector and a second photodetector; first and second transistors both coupled to the first photodetector; and third and fourth transistors both coupled to the second photodetector. 14. The photonic device of claim 13 , wherein the first photodetector is coupled to respective sources of the first and second transistors, and wherein the first transistor and the third transistor have drains that are coupled to each other. 15. The photonic device of claim 13 , wherein the first and third transistors are arranged as an inverter, and wherein the first photodetector is coupled to respective sources of the first and second transistors. 16. The photonic device of claim 13 , wherein the first photodetector is further coupled to the third and fourth transistors and the second photodetector is further coupled to the first and second transistors, and wherein the first transistor and the second transistor have drains that are coupled to each other and sources that are coupled to each other. 17. The photonic device of claim 9 , wherein the modulatable detector comprises: a first photodetector and a second photodetector; first and second transistors both coupled to the first photodetector; and a node coupled to the first and second photodetectors and further coupled to the first and second transistors. 18. The photonic device of claim 9 , wherein the modulatable detector comprises a photodetector and a plurality of transistors, and wherein the photodetector and the plurality of transistors are formed on a common semiconductor substrate. 19. The photonic device of claim 9 , wherein the modulatable detector comprises a plurality of balanced photodetectors and a plurality of transistors arranged differentially.

Assignees

Inventors

Classifications

  • G06N3/0675Primary

    using electro-optical, acousto-optical or opto-electronic means · CPC title

  • Matrix or vector computation {, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization (matrix transposition G06F7/78)} · CPC title

  • G06F7/523Primary

    Multiplying only · CPC title

  • using a capacitor · CPC title

  • using displacement encoding scales · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US11169780B2 cover?
Photonic processors are described. The photonic processors described herein are configured to perform matrix-matrix (e.g., matrix-vector) multiplication. Some embodiments relate to photonic processors arranged according to a dual-rail architecture, in which numeric values are encoded in the difference between a pair optical signals (e.g., in the difference between the powers of the optical sign…
Who is the assignee on this patent?
Lightmatter Inc
What technology area does this patent fall under?
Primary CPC classification G06N3/0675. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Nov 09 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).