Semiconductor device

Patent metadata

Field	Value
Publication number	US-11164841-B2
Application number	US-201916672581-A
Country	US
Kind code	B2
Filing date	Nov 4, 2019
Priority date	Dec 7, 2018
Publication date	Nov 2, 2021
Grant date	Nov 2, 2021

Abstract

A semiconductor device may be provided with a first member, a second member joined to a first region of the first member via a first solder layer and a third member joined to a second region of the first member via a second solder layer. The first region and the second region are located on one side of the first member. The first solder layer contains a plurality of support particles that is constituted of a material having a higher melting point than the first solder layer. The second solder layer does not contain any support particles.

First claim

What is claimed is:

1. A semiconductor device in which a plurality of members including a semiconductor element are joined together via solder layers, the semiconductor device comprising:
a first member;
a second member joined to a first region of the first member via a first solder layer, the first region being located on a first side of the first member; and
a third member joined to a second region of the first member via a second solder layer, the second region being located on the first side of the first member,
wherein
the first solder layer contains a plurality of support particles that is constituted of a material having a higher melting point than the first solder layer, and
the second solder layer does not contain any support particles.

2. The semiconductor device according to claim 1 , wherein each of the plurality of support particles is in contact with both the first member and the second member.

3. The semiconductor device according to claim 1 , wherein an area of the first region is greater than an area of the second region.

4. The semiconductor device according to claim 1 , wherein, in a view perpendicular to a surface of the first region that is in contact with the first solder layer, a center of gravity of the first member is located within the first region.

5. The semiconductor device according to claim 1 , wherein a normal vector of a surface of the first region that is in contact with the first solder layer is parallel with a normal vector of a surface of the second region that is in contact with the second solder layer.

6. The semiconductor device according to claim 1 , wherein the plurality of support particles is constituted of a metallic material.

7. The semiconductor device according to claim 6 , wherein the plurality of support particles is constituted of nickel (Ni) or copper (Cu).

8. The semiconductor device according to claim 1 , wherein
the semiconductor element is joined to the second member via a third solder layer at an opposite side from the first solder layer, and
the third solder layer contains a plurality of second support particles that is constituted of a material having a higher melting point than the third solder layer.

9. A method of manufacturing a semiconductor device in which a plurality of members including a semiconductor element are joined together via solder layers, the method comprising:
placing a second member above a first region of a first member via a first solder material and placing a third member above a second region of the first member via a second solder material, the first region and the second region being located on a first side of the first member; and
soldering the second member and the third member to the first side of the first member by melting the first solder material and the second solder material,
wherein
the first solder material contains a plurality of support particles that is constituted of material having a higher melting point than the first solder material, and
the second solder material does not contain any support particles.

10. The method according to claim 9 , wherein, in the soldering of the second member and the third member, the first member is attracted to the second member and the third member by surface tensions of the melted first solder material and the melted second solder material such that each of the plurality of support particles makes contact with both the first member and the second member.

Assignees

• Denso Corp

Inventors

• Iwasaki Shingo
• Hatasa Keita
• Takahagi Satoshi

Classifications

• H10W90/736

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W72/07336

  Soldering or alloying · CPC title

• H10W70/24

  characterised by materials · CPC title

• H10W72/07331

  Connecting techniques · CPC title

• H10W72/952

  comprising metals or metalloids, e.g. PbSn, Ag or Cu · CPC title