Multi-layered ceramic electronic component and manufacturing method thereof

Patent metadata

Field	Value
Publication number	US-11158458-B2
Application number	US-201916680995-A
Country	US
Kind code	B2
Filing date	Nov 12, 2019
Priority date	Jul 22, 2019
Publication date	Oct 26, 2021
Grant date	Oct 26, 2021

Abstract

A multilayer ceramic electronic component includes a ceramic body including first and second internal electrodes disposed to face each other and a dielectric layer interposed therebetween. When an average thickness of the dielectric layer is denoted as ‘td,’ an average thickness of the first and second internal electrodes is denoted as ‘te,’ and a standard deviation of thicknesses of an internal electrode, measured at a plurality of points in a predetermined region of the internal electrode, is denoted as ‘σte,’ a ratio of the standard deviation of thicknesses of the internal electrode to the average thickness of the dielectric layer, which is denoted as ‘σte/td,’ satisfies 0.12≤σte/td≤0.21.

First claim

What is claimed is:

1. A multilayer ceramic electronic component, comprising
a ceramic body including first and second internal electrodes disposed to face each other and a dielectric layer interposed therebetween,
wherein, when an average thickness of the dielectric layer is denoted as ‘td,’ an average thickness of the first and second internal electrodes is denoted as ‘te,’ and a standard deviation of thicknesses of an internal electrode, measured at a plurality of points in a predetermined region of the internal electrode, is denoted as ‘σte,’ a ratio of the standard deviation of thicknesses of the internal electrode to the average thickness of the dielectric layer, which is denoted as ‘σte/td,’ satisfies 0.12≤σte/td≤0.21, and
wherein the average thickness of the dielectric layer is 0.4 μm or less.

2. The multilayer ceramic electronic component of claim 1 , wherein a thickness direction (T) is defined as a direction in which the dielectric layer is interposed between the first and second internal electrodes, and a length direction (L) is a direction perpendicular to the thickness direction, and
wherein the td and the te are average thicknesses of the dielectric layer and the first and second internal electrodes, respectively, in a length-thickness (L-T) direction cross-section cut in a central portion of the ceramic body in a width direction (W), which is a direction perpendicular to the thickness direction and the length direction.

3. The multilayer ceramic electronic component of claim 1 , wherein the average thickness of the first and second internal electrodes is 0.41 μm or less.

4. The multilayer ceramic electronic component of claim 1 , wherein a thickness direction (T) is defined as a direction in which the dielectric layer is interposed between the first and second internal electrodes, and a length direction (L) is a direction perpendicular to the thickness direction, and
wherein the thicknesses for the σte are measured in at least 10 points of the predetermined region of the internal electrode, having a size of 20 μm×14 μm, in a length-thickness direction (L-T) cross-section of the ceramic body, and the at least 10 points have intervals of 10 nm or less.

5. The multilayer ceramic electronic component of claim 1 , further comprising external electrodes disposed on an external surface of the ceramic body.

6. The multilayer ceramic electronic component of claim 5 , wherein an average thickness of the external electrodes is in a range of 10 μm to 50 μm.

7. A method of manufacturing a multilayer ceramic electronic component, comprising steps of:
preparing ceramic green sheets each containing ceramic powder;
forming an internal electrode pattern with a conductive paste, containing conductive metal particles, and an additive on each ceramic green sheet;
stacking the ceramic green sheets, on each of which the internal electrode pattern is formed, to form a ceramic laminate; and
firing the ceramic laminate to form a ceramic body, which includes at least one dielectric layer and at least one internal electrode,
wherein, when an average thickness of the at least one dielectric layer is denoted as ‘td,’ an average thickness of the at least one internal electrode is denoted as ‘te,’ and a standard deviation of thicknesses of an internal electrode, measured at a plurality of points in a predetermined region of the internal electrode, is denoted as ‘σte,’ a ratio of the standard deviation of thicknesses of the internal electrode to the average thickness of the dielectric layer, which is denoted as ‘σte/td,’ satisfies 0.12≤σte/td≤0.21, and
wherein the average thickness of the at least one dielectric layer is 0.4 μm or less.

8. The method of manufacturing the multilayer ceramic electronic component of claim 7 , wherein a thickness direction (T) is defined as a direction in which the ceramic green sheets are stacked, and a length direction (L) is a direction perpendicular to the thickness direction, and
wherein the td and the te are average thicknesses of the at least one dielectric layer and the at least one internal electrode, respectively, in the length-thickness (L-T) direction cross-section cut in a central portion of the ceramic body in a width direction (W), which is a direction perpendicular to the thickness direction and the length direction.

9. The method of manufacturing the multilayer ceramic electronic component of claim 7 , wherein the average thickness of the at least one internal electrode is 0.41 μm or less.

10. The method of manufacturing the multilayer ceramic electronic component of claim 7 , wherein a thickness direction (T) is defined as a direction in which the ceramic green sheets are stacked, and a length direction (L) is a direction perpendicular to the thickness direction, and
wherein the thicknesses for the σte are measured in at least 10 points of the predetermined region of the internal electrode, having a size of 20 μm×14 μm, in a length-thickness direction (L-T) cross-section of the ceramic body, and the at least 10 points have intervals of 10 nm or less.

Assignees

• Samsung Electro Mech

Inventors

• Cha Kyoung Jin
• Oh Hyun Soo
• Shin Woo Chul
• Jang Hye Ji

Classifications

• H01G4/1209

  characterised by the ceramic dielectric material (H01G4/1272, H01G4/1281 take precedence) · CPC title

• H01G4/1218 Primary

  based on titanium oxides or titanates (H01G4/1245 takes precedence) · CPC title

• H01G4/12

  Ceramic dielectrics {(H01G4/085 takes precedence)} · CPC title

• H01G4/302 Primary

  obtained by injection of metal in cavities formed in a ceramic body · CPC title

• H01G4/232

  electrically connecting two or more layers of a stacked or rolled capacitor · CPC title