Soft watermarking in thread shared resources implemented through thread mediation

Patent metadata

Field	Value
Publication number	US-11144353-B2
Application number	US-201916585586-A
Country	US
Kind code	B2
Filing date	Sep 27, 2019
Priority date	Sep 27, 2019
Publication date	Oct 12, 2021
Grant date	Oct 12, 2021

Abstract

Techniques for use in a microprocessor core for soft watermarking in thread shared resources implemented through thread mediation. A thread is removed from a thread mediation decision involving multiple threads competing or requesting to use a shared resource at a current clock cycle based on a number of entries in the shared resource that the thread is estimated to have allocated to it at the current clock cycle. By removing the thread from the thread mediation decision, the thread is stalled from allocating additional entries in the shared resource.

First claim

The invention claimed is:

1. A microprocessor comprising:
a shared resource of a multithreaded microprocessor core, the shared resource having a plurality of entries for use by a plurality of threads; and
wherein the multithreaded microprocessor core is configured to:
determine an allocation estimate for a thread of the plurality of threads, wherein the allocation estimate is an estimate of the cardinality of a set of entries of the plurality of entries, that the thread will be allocated at a future clock cycle relative to a current clock cycle;
determine whether the allocation estimate for the thread satisfies an allocation target, wherein the allocation target is the cardinality of a should-not-exceed number of entries that is allocated to the thread; and
remove the thread from a thread mediation decision based on a determination that the allocation estimate for the thread satisfies the allocation target; and

wherein the multithreaded microprocessor core is further configured to determine the allocation estimate based on:
the cardinality of a set of entries, of the plurality of entries, that the thread was allocated at a clock cycle in the past relative to the current clock cycle; and
a number of times the thread was selected to use the shared resource prior to the current clock cycle.

2. The microprocessor of claim 1 , wherein the multithreaded microprocessor core is further configured to:
determine the allocation estimate based on:
a sum of:
(a) the cardinality of a set of entries, of the plurality of entries, that the thread was allocated at the clock cycle in the past relative to the current clock cycle, and
(b) a product of the number of times the thread was selected to use the shared resource prior to the current clock cycle, and a predefined number of entries.

3. The microprocessor of claim 1 , wherein the shared resource has a total number of entries, and wherein the should-not-exceed number of entries is the total number of entries.

4. The microprocessor of claim 1 , wherein the shared resource has a total number of entries, and wherein the should-not-exceed number of entries is less than the total number of entries.

5. The microprocessor of claim 1 , wherein the multithreaded microprocessor core is further configured to:
remove the thread from a thread mediation decision based on a determination that the allocation estimate for the thread equals an allocation target.

6. The microprocessor of claim 1 , wherein the multithreaded microprocessor core is further configured to:
remove the thread from a thread mediation decision based on a determination that the allocation estimate for the thread exceeds an allocation target.

7. The microprocessor of claim 1 , wherein the multithreaded microprocessor core is further configured to:
store an allocation count for each clock cycle of a plurality of clock cycles, the allocation count at each clock cycle of the plurality of clock cycles being the cardinality of a set of entries of the plurality of the entries allocated to the thread at a clock cycle in the past relative to the each clock cycle; and
determine the estimate of the cardinality of the set of entries that the thread is allocated at the current clock cycle based on the allocation count at the current clock cycle.

8. The microprocessor of claim 1 , wherein the multithreaded microprocessor core is further configured to:
maintain a selection count over a sliding window of a plurality of clock cycles, the selection count at the current clock cycle being the number of times the thread was selected to use the shared resource prior to the current clock cycle; and
determine the estimate of the cardinality of the set of entries that the thread is allocated at the current clock cycle based on the selection count at the current clock cycle.

9. A microprocessor comprising:
a shared resource of a multithreaded microprocessor core, the shared resource having a plurality of entries for use by a plurality of threads; and
wherein the multithreaded microprocessor core is configured to:
determine an allocation estimate for each thread of the plurality of threads;
wherein the allocation estimate for a thread is an estimate of the cardinality of the set of entries, of the plurality of entries, that the thread will be allocated at a future clock cycle relative to a current clock cycle;
for each thread of the plurality of threads, determine if the allocation estimate for the thread satisfies an allocation target for the thread, wherein the allocation target for the thread is the cardinality of a should-not-exceed number of entries, of the plurality of entries, that is allocated to the thread; and
for each thread of the plurality of threads, remove the thread from a thread mediation decision if the allocation estimate for the thread satisfies the allocation target and

wherein the multithreaded microprocessor core is further configured to:
for each thread of the plurality of threads, determine the allocation estimate for the thread based on a number of times the thread has been selected to use the shared resource.

10. The microprocessor of claim 9 , wherein the multithreaded microprocessor core is further configured to:
for each thread of the plurality of threads, determine the allocation target for the thread based on an allocation count for the thread.

11. The microprocessor of claim 9 , wherein the multithreaded microprocessor core is further configured to:
for each thread of the plurality of threads, determine the allocation estimate for the thread based on an allocation count for the thread, wherein the allocation count for the thread reflects a number of entries of the plurality of entries allocated to the thread at a clock cycle prior to a clock cycle at which the thread mediation decision is made.

12. The microprocessor of claim 9 , wherein the multithreaded microprocessor core is further configured to:
for each thread of the plurality of threads, determine the allocation estimate for the thread and based on an assumption of a number of entries of the plurality of entries the thread is expected to allocate if the thread is selected to use the shared resource.

13. The microprocessor of claim 9 , wherein the multithreaded microprocessor core is further configured to:
for each thread of the plurality of threads, remove the thread from a thread mediation decision based on the allocation estimate satisfying the allocation target for the thread.

14. The microprocessor of claim 9 , wherein the allocation target for each thread of the plurality of threads is statically configured.

15. The microprocessor of claim 9 , wherein the allocation target for each thread of the plurality of threads is dynamically and automatically determined.

16. The microprocessor of claim 9 , wherein the shared resource is a load queue, a reservation station, or a register file of the multithreaded microprocessor core.

17. The microprocessor of claim 9 , further comprising:
a corresponding register, for each thread of the plurality of threads, for maintaining an allocation count for the thread;
a corresponding register, for each thread of the plurality of threads, for maintaining a selection count for the thread; and
wherein the multithreaded microprocessor core is further configured to:
for each thread of the plurality of threads, determine the allocation estimate for the thread based on the corresponding register maintaining the allocation count for the thread and based on the corresponding register maintaining the selection count for the thread.

Assignees

• Advanced Micro Devices Inc

Inventors

• Troester Kai

Classifications

• G06F9/3851 Primary

  from multiple instruction streams, e.g. multistreaming · CPC title

• G06F9/5061 Primary

  Partitioning or combining of resources · CPC title

• G06F9/5005 Primary

  to service a request · CPC title