Imaging systems with improved circuitry to provide boosted control signals

Patent metadata

Field	Value
Publication number	US-11140344-B2
Application number	US-202016947012-A
Country	US
Kind code	B2
Filing date	Jul 15, 2020
Priority date	Aug 21, 2019
Publication date	Oct 5, 2021
Grant date	Oct 5, 2021

Abstract

An image sensor having rows and columns of image pixels may include row control circuitry that controls voltages that are sent to each row of the image pixels. The row control circuitry may include booster circuitry that converts a positive power supply voltage (such as 2.8V) to voltages that are negative or otherwise less than the positive power supply voltage and/or greater than the positive power supply voltage. The booster circuitry may have a plurality of switches that control an input to an amplifier, thereby allowing the circuitry to produce any desired voltage in a given range. The booster circuitry output may be shared between multiple rows of the image pixels, and the produced boosted circuitry may be fed to any desired one or more of the rows of image pixels.

First claim

What is claimed is:

1. An image sensor comprising:
an array of imaging pixels having rows and columns of pixels; and
row control circuitry coupled to the rows of pixels, wherein the row control circuitry comprises booster circuitry that is shared between multiple rows of pixels and the booster circuitry comprises:
a first plurality of switches coupled to ground and power supply sources;
an amplifier with first and second inputs and an output, wherein the first input is coupled to a first reference voltage;
a second plurality of switches coupled to the output of the amplifier;
a first capacitor coupled between the first plurality of switches and the second plurality of switches;
a second capacitor;
a third plurality of switches coupled between the first plurality of switches and the second capacitor;
a fourth plurality of switches coupled between the second capacitor and the second input of the amplifier; and

an output switch, wherein a node is interposed between the first plurality of switches and the output switch and wherein the third plurality of switches is coupled to the node.

2. The image sensor defined in claim 1 wherein the first plurality of switches comprises:
a first switch coupled to a first additional node that is between the output of the amplifier and the output switch, wherein the first switch is coupled to the power supply voltage; and
a second switch coupled to a second additional node, wherein the first additional node is between the second additional node and the output switch, and wherein the second switch is coupled to ground.

3. The image sensor defined in claim 2 wherein the second plurality of switches comprises:
a third switch coupled between the first capacitor and the power supply voltage, wherein the third switch is coupled to the power supply voltage; and
a fourth switch coupled to a third additional node between the first capacitor and the output of the amplifier, wherein the fourth switch is coupled to ground.

4. The image sensor defined in claim 3 wherein the third plurality of switches comprises:
a fifth switch coupled to a fourth additional node that is between the first node and the output switch, wherein the second capacitor is coupled between the fifth switch and the second input of the amplifier;
a sixth switch coupled to a fifth additional node between the fifth switch and the second capacitor, wherein the sixth switch is coupled to a second reference voltage; and
a seventh switch coupled to a sixth additional node between the fifth node and the second capacitor, wherein the seventh switch is coupled to ground.

5. The image sensor defined in claim 4 wherein the fourth plurality of switches comprises:
eight and ninth switches coupled in parallel to a second node between the second capacitor and the second input of the amplifier, wherein the eight switch is coupled to ground and wherein the ninth switch is coupled to the second reference voltage.

6. The image sensor defined in claim 5 wherein the output switch is coupled to an output node, the booster circuitry further comprising a third capacitor coupled to the output node.

7. The image sensor defined in claim 6 wherein the power supply voltage is 2.8V.

8. The image sensor defined in claim 7 , wherein the second switch, the third switch, the seventh switch, and the ninth switch are configured to be on during pre-charge operations to output a voltage between −1.0V and 0V from the booster circuitry.

9. The image sensor defined in claim 7 , wherein the second switch, the fourth switch, the seventh switch, and the eighth switch are configured to be on during pre-charge operations to output a voltage between 0V and 2.0V from the booster circuitry.

10. The image sensor defined in claim 7 , wherein the second switch, the fourth switch, the sixth switch, and the eighth switch are configured to be on during pre-charge operations to output a voltage above 2.0V from the booster circuitry.

11. The image sensor defined in claim 7 , wherein the first switch, the fourth switch, the eighth switch, and at least one of the fifth switch and the sixth switch are configured to be on during pre-charge operations to output a voltage above 2.8V from the booster circuitry.

Assignees

• Semiconductor Components Ind Llc

Inventors

• Gurindagunta Sundaraiah

Classifications

• H04N25/709 Primary

  Circuitry for control of the power supply · CPC title

• H04N25/78

  Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters · CPC title

• H04N25/779

  Circuitry for scanning or addressing the pixel array · CPC title

• H04N25/766

  comprising control or output lines used for a plurality of functions, e.g. for pixel output, driving, reset or power · CPC title

• H04N25/74

  Circuitry for scanning or addressing the pixel array · CPC title