Evaporated ion conductive layer for decreased interfacial resistance/impedance at silicon based electrode interface

US11127987B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11127987-B2
Application numberUS-201916397497-A
CountryUS
Kind codeB2
Filing dateApr 29, 2019
Priority dateApr 29, 2019
Publication dateSep 21, 2021
Grant dateSep 21, 2021

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Abstract

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An interfacial additive layer for decreasing the interfacial resistance/impedance of a silicon based electrode-containing device such as, for example, an energy storage device or a micro-resistor, is disclosed. The interfacial additive, which is composed of evaporated lithium fluoride, is formed between a silicon based electrode and a solid polymer electrolyte layer of the device. The evaporated lithium fluoride serves as ion conductive layer. The presence of such an interfacial additive layer increases the ion and electron mobile dependent performances at the silicon based electrode interface due to significant decrease in the resistance/impedance that is observed at the respective interface as well as the impedance observed in the bulk of the device.

First claim

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What is claimed is: 1. A device comprising: a silicon based electrode composed of a silicon-containing material having semiconductor properties, wherein the silicon-containing material is selected from the group consisting of silicon, a silicon germanium alloy and a carbon-doped silicon based alloy; an interfacial additive layer composed of amorphous lithium fluoride formed by evaporation of a source material of lithium fluoride, wherein the interfacial additive layer has a first surface forming an interface with a surface of the silicon based electrode; an interface region comprising a mixed composition of the silicon-containing material and the amorphous lithium fluoride present at the interface between the interfacial additive layer and the surface of the silicon based electrode; and a solid polymer electrolyte layer forming an interface with a second surface of the interfacial additive layer that is opposite the first surface of the interfacial additive layer. 2. The device of claim 1 , wherein the silicon based electrode is composed of silicon, and the silicon is selected from the group consisting of non-porous silicon, partially porous crystalline silicon, single-crystal non-porous silicon, crystalline silicon, a low resistance doped crystalline silicon, boron doped crystalline silicon and boron doped crystalline porous silicon. 3. The device of claim 1 , wherein the solid polymer electrolyte layer is composed of a mixture of a polymer structure host material, a Li-conductive/plasticizing material and a lithium containing salt. 4. The device of claim 3 , wherein the polymer structure host material is composed of at least one of poly(ethylene oxide) (PEO), poly(propylene oxide) (PPO), poly(dimethylsiloxane), poly(vinyl chloride), or polycaprolactone. 5. The device of claim 3 , wherein the Li-conductive/plasticizing material comprises at least one of succinonitrile, poly(ethylene glycol) (PEG), an aprotic organic solvent, or dimethylsulfoxide (DMSO). 6. The device of claim 3 , wherein the lithium containing salt is composed of at least one of lithium hexafluorophosphate, lithium perchlorate, lithium trifluoromethanesulfonate, lithium fluoride, LiBF 4 , lithium chloride, lithium phosphate compounds, lithium bromide compounds, lithium bis(trifluoromethanesulfonyl)imide (LiTFSI), lithium difluoro(oxalato)borate (LiDFOB), or lithium bis(oxalato)borate(LiBOB). 7. The device of claim 1 , wherein the solid polymer electrolyte layer comprises a lower region and an upper region, and wherein a separator is present between the lower region and the upper region. 8. The device of claim 7 , wherein the separator is composed of at least one of polyacrylnitrile (PAN), polyethylene oxide (PEO) based copolymer matrices or structural membranes, a quarternized polysulfone membrane, electrospun polyvinylidene fluoride, or a methylmethacrylate (MMA)/polyethylene (PE) composite. 9. The device of claim 1 , wherein the solid polymer electrolyte layer is composed of a garnet/polymer electrolyte composite. 10. The device of claim 1 , further comprising a counter electrode located above the solid polymer electrolyte layer. 11. The device of claim 10 , wherein the counter electrode is a second silicon based electrode composed of a second silicon-containing material having semiconductor properties, wherein the second silicon-containing material is selected from the group consisting of silicon, a silicon germanium alloy and a carbon-doped silicon based alloy, and wherein a second interfacial additive layer composed of amorphous lithium fluoride formed by evaporation of a source material of lithium fluoride is present directly between the solid polymer electrolyte layer and the second silicon based electrode. 12. The device of claim 11 , wherein the silicon based electrode is composed of silicon, and the silicon is selected from the group consisting of non-porous silicon, partially porous crystalline silicon, single-crystal non-porous silicon, crystalline silicon, a low resistance doped crystalline silicon, boron doped crystalline silicon and boron doped crystalline porous silicon. 13. The device of claim 1 , wherein an interfacial area between the silicon based electrode and the interfacial additive layer has a charge resistance of 43 ohms/cm 2 , the interfacial area and bulk regions of the solid polymer electrolyte layer has a mass transport resistance of less than 2895 ohms/cm 2 , and wherein a mass transfer/charge transfer resistance ratio is less than, or equal to, 68. 14. A device comprising: a silicon based electrode composed of boron doped crystalline silicon; an interfacial additive layer composed of amorphous lithium fluoride formed by evaporation of a source material of lithium fluoride, wherein the interfacial additive layer has a first surface forming an interface with a surface of the silicon based electrode; an interface region comprising a mixed composition of the boron doped crystalline silicon and the amorphous lithium fluoride present at the interface between the interfacial additive layer and the surface of the silicon based electrode; and a solid polymer electrolyte layer composed of a mixture of polycaprolactone, succinonitrile and lithium bis(trifluoromethanesulfonyl)imide (LiTFSI) forming an interface with a second surface of the interfacial additive layer that is opposite the first surface of the interfacial additive layer. 15. The device of claim 14 , further comprising a second interfacial additive layer composed of amorphous lithium fluoride formed by evaporation of a source material of lithium fluoride forming an interface with the solid polymer electrolyte layer, and a second silicon based electrode composed of boron doped crystalline silicon forming an interface with the second interfacial additive layer. 16. The device of claim 14 , wherein an interfacial area between the silicon based electrode and the interfacial additive layer has a charge resistance of 43 ohms/cm 2 , the interfacial area and bulk regions of the solid polymer electrolyte layer has a mass transport resistance of less than 2895 ohms/cm 2 , and wherein a mass transfer/charge transfer resistance ratio is less than, or equal to, 68. 17. A method of forming a device, the method comprising: depositing an amorphous lithium fluoride film by evaporation of a lithium fluoride source material on a surface of a silicon based electrode to provide an interfacial additive layer composed of the amorphous lithium fluoride film, wherein the silicon based electrode is composed of a silicon-containing material having semiconductor properties, and wherein the silicon-containing material is selected from the group consisting of silicon, a silicon germanium alloy and a carbon-doped silicon based alloy; and forming a solid polymer electrolyte layer on the interfacial additive layer. 18. The method of claim 17 , further comprising depositing by evaporation lithium fluoride on a surface of a solid polymer electrolyte layer to provide a second interfacial additive layer composed of amorphous lithium fluoride, and forming a counter electrode on the second interfacial additive layer. 19. The method of claim 18 wherein the counter electrode is a lithium transition metal oxide type electrode. 20. The method of claim 17 , further comprising forming a counter electrode above the solid polymer electrolyte layer, wherein the counter electrode is a lithium intercalation- type cathode material.

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What does patent US11127987B2 cover?
An interfacial additive layer for decreasing the interfacial resistance/impedance of a silicon based electrode-containing device such as, for example, an energy storage device or a micro-resistor, is disclosed. The interfacial additive, which is composed of evaporated lithium fluoride, is formed between a silicon based electrode and a solid polymer electrolyte layer of the device. The evaporate…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H01M10/4235. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 21 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).