Circuit aging detection sensor based on voltage comparison

Patent metadata

Field	Value
Publication number	US-11125812-B2
Application number	US-202017033964-A
Country	US
Kind code	B2
Filing date	Sep 28, 2020
Priority date	Sep 26, 2019
Publication date	Sep 21, 2021
Grant date	Sep 21, 2021

Abstract

The invention discloses a circuit aging detection sensor based on voltage comparison. A control circuit generates an aging voltage signal, a standard voltage signal and a reference voltage signal. The aging voltage signal passes through a first voltage-controlled oscillator to generate an aging frequency signal. The standard voltage signal passes through a second voltage-controlled oscillator to generate a standard frequency signal. The standard frequency signal and the aging frequency signal pass through an aging detection circuit to generate a frequency difference signal. A level signal generated by a serial data detector passes through a beat-frequency oscillator to generate a reset signal. A counter quantizes aging information, which is converted by a digital-analog converter into a quantized voltage signal. The quantized voltage signal is compared with the reference voltage signal by a voltage comparator, to generate a hopping signal at a voltage superposition node, and an aging signal is output.

First claim

The invention claimed is:

1. A circuit aging detection sensor based on voltage comparison, comprising:
a control circuit, two voltage-controlled oscillators of same structure, an aging detection circuit, a serial data detector, a beat-frequency oscillator, an 8-bit counter, a digital-analog converter and a voltage comparator,
wherein each voltage-controlled oscillator has an input terminal and an output terminal, the two voltage-controlled oscillators are referred to as a first voltage-controlled oscillator and a second voltage-controlled oscillator separately, the control circuit has a first voltage output terminal, a second voltage output terminal and a third voltage output terminal, the aging detection circuit has a first input terminal allowing an aging frequency to be accessed thereto, a second input terminal allowing a standard frequency to be accessed thereto, and an output terminal for outputting an aging detection signal, the serial data detector has a first input terminal allowing the aging detection signal to be accessed thereto, a second input terminal allowing the standard frequency to be accessed thereto, and an output terminal, the 8-bit counter has an input terminal, a reset terminal and an 8-bit parallel data output terminal, the digital-analog converter has an 8-bit parallel data input terminal and an output terminal, the voltage comparator has a first input terminal, a second input terminal and an output terminal, and the beat-frequency oscillator has an input terminal and an output terminal;
the first voltage output terminal of the control circuit is connected to the input terminal of the first voltage-controlled oscillator, the second voltage output terminal of the control circuit is connected to the input terminal of the second voltage-controlled oscillator, the third voltage output terminal of the control circuit is connected to the first input terminal of the voltage comparator, the output terminal of the first voltage-controlled oscillator is connected to the first input terminal of the aging detection circuit, the output terminal of the second voltage-controlled oscillator is connected to the second input terminal of the aging detection circuit, the input terminal of the 8-bit counter is connected to the second input terminal of the serial data detector, the output terminal of the aging detection circuit is connected to the first input terminal of the serial data detector, the output terminal of the serial data detector is connected to the input terminal of the beat-frequency oscillator, the output terminal of the beat-frequency oscillator is connected to the reset terminal of the 8-bit counter, the 8-bit parallel data output terminal of the 8-bit counter is connected to the 8-bit parallel data input terminal of the digital-analog converter in a one-to-one correspondence manner, the output terminal of the digital-analog converter is connected to the second input terminal of the voltage comparator, and the output terminal of the voltage comparator is an output terminal of the circuit aging detection sensor.

2. The circuit aging detection sensor based on voltage comparison according to claim 1 , wherein the control circuit generates three voltage signals, wherein a first voltage signal is an aging voltage signal which is output by the first voltage output terminal, a second voltage signal is a standard voltage signal which is output by the second voltage output terminal, a third voltage signal is a reference voltage signal which is output by the third voltage output terminal, the aging voltage signal passes through the first voltage-controlled oscillator to generate an aging frequency signal, the standard voltage signal passes through the second voltage-controlled oscillator to generate a standard frequency signal, the standard frequency signal and the aging frequency signal are processed by the aging detection circuit, a frequency difference signal between the standard frequency signal and the aging frequency signal is generated by the aging detection circuit and is output by the output terminal of the aging detection circuit, the frequency difference signal and the standard frequency signal are input to the serial data detector, the standard frequency signal provides an operating frequency for the serial data detector, the serial data detector processes the frequency difference signal to extract a pulse signal from the frequency difference signal and converts the pulse signal into a level signal which serves as a frequency detection domain, the level signal passes through the beat-frequency oscillator to generate a signal RST which serves as a reset signal of the 8-bit counter, the 8-bit counter calculates the number of cycles of the standard frequency signal within the range of the frequency detection domain to quantize aging information, then the quantized aging information is converted by the digital-analog converter into a quantized voltage signal, which is input to the voltage comparator together with the reference voltage signal, the voltage comparator generates a hopping signal at a voltage superposition node of the quantified voltage signal and the reference voltage signal; if the output terminal of the voltage comparator outputs a low level at this moment, it indicates that the current circuit is not aged; or, if the output terminal of the voltage comparator outputs a high level, it indicates that the current circuit has been aged.

3. The circuit aging detection sensor based on voltage comparison according to claim 1 , wherein the voltage comparator comprises a first PMOS (P-type metal-oxide-silicon, PMOS) transistor, a second PMOS transistor, a third PMOS transistor, a fourth PMOS transistor, a fifth PMOS transistor, a sixth PMOS transistor, a seventh PMOS transistor, an eighth PMOS transistor, a ninth PMOS transistor, a tenth PMOS transistor, an eleventh PMOS transistor, a twelfth PMOS transistor, a thirteenth PMOS transistor, a fourteenth PMOS transistor, a fifteenth PMOS transistor, a sixteenth PMOS transistor, a seventeenth PMOS transistor, an eighteenth PMOS transistor, a first NMOS (N-type metal-oxide-silicon, NMOS) transistor, a second NMOS transistor, a third NMOS transistor, a fourth NMOS transistor, a fifth NMOS transistor, a sixth NMOS transistor, a seventh NMOS transistor, an eighth NMOS transistor, a ninth NMOS transistor, a tenth NMOS transistor, an eleventh NMOS transistor, a twelfth NMOS transistor, a thirteenth NMOS transistor, a fourteenth NMOS transistor, a fifteenth NMOS transistor, a sixteenth NMOS transistor, a seventeenth NMOS transistor, a first capacitor and a second capacitor,
wherein a source of the first PMOS transistor, a source of the second PMOS transistor, a source of the fourth PMOS transistor, a source of the sixth PMOS transistor, a source of the seventh PMOS transistor, a source of the ninth PMOS transistor, a source of the twelfth PMOS transistor, a source of the fourteenth PMOS transistor, a source of the sixteenth PMOS transistor and a source of the eighteenth PMOS transistor are connected, a gate of the first PMOS transistor, a drain of the first PMOS transistor, a drain of the first NMOS transistor, a gate of the third PMOS transistor, a gate of the fifth PMOS transistor, a gate of the eighth PMOS transistor, a gate of the tenth PMOS transistor, a gate of the fifteenth PMOS transistor and a gate of the seventeenth PMOS transistor are connected, a drain of the second PMOS transistor and a source of the third PMOS transistor are connected, a gate of the second PMOS transistor, a gate of the fourth PMOS transistor, a drain of the fifth PMOS transistor, a drain of the fourth NMOS transistor, a gate of the sixth PMOS transistor, a gate of the seventh PMOS transistor, a gate of the ninth PMOS transistor and a gate of the twelfth PMOS transistor are connected, a drain of the third PMOS transistor, a drain of the seco

Assignees

• Univ Ningbo

Inventors

• Wang Pengjun
• Zhang Haiming
• Zhang Yuejun
• Zhang Huihong
• Zhang Xiaotian
• Yu Haizhen

Classifications

• G01R31/2879

  related to electrical aspects, e.g. to voltage or current supply or stimuli or to electrical loads · CPC title

• G01R31/2882

  Testing timing characteristics · CPC title

• G01R31/2856 Primary

  Internal circuit aspects, e.g. built-in test features; Test chips; Measuring material aspects, e.g. electro migration [EM] · CPC title

• G01R31/2884 Primary

  using dedicated test connectors, test elements or test circuits on the IC under test (G01R31/2855 takes precedence) · CPC title

• G01R31/003 Primary

  Environmental or reliability tests (of individual semiconductors G01R31/2642; of PCB's G01R31/2817; of IC's G01R31/2855; of other circuits G01R31/2849) · CPC title