Semiconductor device including capacitor

US11114541B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11114541-B2
Application numberUS-202017035675-A
CountryUS
Kind codeB2
Filing dateSep 28, 2020
Priority dateJul 7, 2017
Publication dateSep 7, 2021
Grant dateSep 7, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Disclosed is a semiconductor device including a bottom electrode, a dielectric layer, and a top electrode that are sequentially disposed on a substrate. The dielectric layer includes a hafnium oxide layer including hafnium oxide having a tetragonal crystal structure, and an oxidation seed layer including an oxidation seed material. The oxidation seed material has a lattice constant having a lattice mismatch of 6% or less with one of a horizontal lattice constant and a vertical lattice constant of the hafnium oxide having the tetragonal crystal structure.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device, comprising a capacitor including a bottom electrode, a dielectric layer, and a top electrode that are sequentially disposed on a substrate, wherein the dielectric layer comprises a hafnium oxide layer including hafnium oxide having a tetragonal crystal structure, wherein the capacitor further includes two seed layers respectively disposed between the hafnium oxide layer and one selected from the bottom electrode and the top electrode, wherein a first one of the two seed layers is an oxidation seed layer, and wherein a second one of the two seed layers is a conductive seed layer including at least one selected from the group consisting of cobalt, nickel, copper, and cobalt nitride. 2. The semiconductor device of claim 1 , wherein the oxidation seed layer includes zirconium oxide, niobium oxide, germanium oxide, tin oxide, molybdenum oxide, or titanium oxide, wherein the hafnium oxide layer and the oxidation seed layer are in contact with each other. 3. The semiconductor device of claim 2 , further comprising: a sub-oxide layer between the hafnium oxide layer and the conductive seed layer. 4. The semiconductor device of claim 3 , wherein the sub-oxide layer comprises an oxide of the same metal as that included in the conductive seed layer. 5. The semiconductor device of claim 1 , wherein the conductive seed layer further comprises nitrogen. 6. The semiconductor device of claim 1 , wherein the conductive seed layer comprises a conductive seed material including a lattice constant having a lattice mismatch of 2% or less with one of a horizontal lattice constant and a vertical lattice constant of the hafnium oxide. 7. The semiconductor device of claim 6 , wherein the oxidation seed layer comprises an oxidation seed material including a lattice constant having a lattice mismatch of 6% or less with one of the horizontal lattice constant and the vertical lattice constant of the hafnium oxide. 8. The semiconductor device of claim 1 , wherein the conductive seed layer has a band gap energy of 3.5 eV or less, and wherein the conductive seed layer has a work function of 4.7 eV or more. 9. A semiconductor device, comprising: a first electrode; a dielectric layer disposed on the first electrode, the dielectric layer comprising a hafnium oxide layer and an oxidation seed layer being in contact with each other; a second electrode disposed on the dielectric layer; and a conductive seed layer disposed between the second electrode and the hafnium oxide layer, wherein the hafnium oxide layer includes hafnium oxide having a tetragonal crystal structure, and wherein the conductive seed layer includes a conductive seed material, the conductive seed material including cobalt, nickel, copper, and cobalt nitride. 10. The semiconductor device of claim 9 , wherein the conductive seed layer further comprises nitrogen. 11. The semiconductor device of claim 9 , further comprising: a sub-oxide layer between the hafnium oxide layer and the conductive seed layer, wherein the sub-oxide layer comprises an oxide of the same metal as that included in the conductive seed layer. 12. The semiconductor device of claim 11 , wherein the sub-oxide layer has a thickness ranging from 5 Å to 10 Å. 13. The semiconductor device of claim 9 , wherein the oxidation seed layer is disposed between the first electrode and the hafnium oxide layer. 14. The semiconductor device of claim 13 , wherein the oxidation seed layer includes niobium oxide, germanium oxide, tin oxide, molybdenum oxide, or titanium oxide. 15. The semiconductor device of claim 14 , wherein the oxidation seed layer further comprises nitrogen. 16. The semiconductor device of claim 13 , wherein the oxidation seed layer includes zirconium oxide. 17. The semiconductor device of claim 9 , wherein the conductive seed material has a band gap energy of 3.5 eV or less, and wherein the conductive seed material has a work function of 4.7 eV or more. 18. The semiconductor device of claim 9 , wherein the conductive seed material includes a lattice constant having a lattice mismatch of 2% or less with one of a horizontal lattice constant and a vertical lattice constant of the hafnium oxide. 19. The semiconductor device of claim 18 , wherein the oxidation seed layer comprises an oxidation seed material including a lattice constant having a lattice mismatch of 6% or less with one of the horizontal lattice constant and the vertical lattice constant of the hafnium oxide.

Assignees

Inventors

Classifications

  • comprising multiple local oxidation process steps · CPC title

  • formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI] · CPC title

  • Capacitive arrangements (H10W44/20 takes precedence) · CPC title

  • H10D1/684Primary

    the dielectrics comprising multiple layers, e.g. comprising buffer layers, seed layers or gradient layers · CPC title

  • the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials · CPC title

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What does patent US11114541B2 cover?
Disclosed is a semiconductor device including a bottom electrode, a dielectric layer, and a top electrode that are sequentially disposed on a substrate. The dielectric layer includes a hafnium oxide layer including hafnium oxide having a tetragonal crystal structure, and an oxidation seed layer including an oxidation seed material. The oxidation seed material has a lattice constant having a lat…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W10/0128. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 07 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).