Private virtualized displays

Patent metadata

Field	Value
Publication number	US-11114069-B2
Application number	US-201716481305-A
Country	US
Kind code	B2
Filing date	Dec 8, 2017
Priority date	Dec 8, 2017
Publication date	Sep 7, 2021
Grant date	Sep 7, 2021

Abstract

In some examples, a non-transitory machine readable medium storing instructions executable by a processor to store display information in a private memory hidden from an operating system (OS), and divisibly virtualize a contiguous planar display into a first area as a main display and a second area as a second display separate from the main display, where the continuous planar display is divisibly virtualized responsive to exposure of the display information to the OS or the display information being directly provided to a graphics processing unit (GPU).

First claim

What is claimed:

1. A non-transitory machine readable medium storing instructions executable by a processor to:
store display information in a private physical memory hidden from an operating system (OS); and
divisibly virtualize a contiguous planar display into a first area as a main display and a second area as a second display separate from the main display, wherein the continuous planar display is divisibly virtualized responsive to:
exposure of the display information in the private physical memory to the OS; or
the display information being directly provided from the private physical memory to a graphics processing unit (GPU).

2. The medium of claim 1 , wherein the display information includes a resolution or a display size of the second display.

3. The medium of claim 1 , including instructions to expose display content to the OS when selectively exposing the display information to the OS or provide the display content directly to the GPU when directly providing the display information to the GPU.

4. The medium of claim 3 , wherein the display content includes frames of variable data rate video.

5. The medium of claim 3 , wherein the display content is displayed in the second area but is not displayed in the first area.

6. The medium of claim 1 , further comprising instructions to expose the display information to the OS when a hidden mode is inactive.

7. The medium of claim 1 , further comprising instructions to directly provide the display information from the private physical memory to the GPU when a hidden mode is active.

8. A system, comprising:
a display device having a contiguous planar display and a first interface;
a computing device having a second interface to couple with the first interface of the display device, the computing device including an operating system (OS), a private random-access memory (RAM) hidden from the OS, and a processor, the processor to:
store display information in the private RAM; and
divisibly virtualize the contiguous planar display into a first area of the planar display as a main area and a second area isolated from the main area, wherein the continuous planar display is divisibly virtualized responsive to both an input to activate dual display mode and:
exposure of the display information in the private RAM to the OS; or
the display information being directly provided to a graphics processing unit (GPU).

9. The system of claim 8 , further comprising an individual physical display implementing the contiguous planar display.

10. The system of claim 8 , including a scaler or timing controller hardware in the display device to expose the contiguous planar display to the OS as a main GUI and a second GUI when the display information is exposed to the OS.

11. The system of claim 8 , further comprising instructions to receive the input via a user interface of the contiguous planar display, activation of a physical switch, or launch of an application executing on the system.

12. The system of claim 8 , wherein in the dual display mode, the system is to display in the second GUI a plurality of operable GUI controls particular to an application that currently has focus in the main GUI and that running on the computing device.

13. The system of claim 8 , further comprising instructions to use the entire area of the planar display as the main area when dual display mode is inactive.

14. A computing device comprising:
a graphics processing unit (GPU);
an interface to couple to a display device having a contiguous planar display
a physical memory including a private frame buffer and a public frame buffer; and
processor to:
store display information in the private frame buffer; and
responsive to an input to activate dual display mode:
divisibly virtualize the contiguous planar display into a first area of the planar display as a main area and a second area isolated from the main area, wherein the continuous planar display is divisibly virtualized responsive to:
selective exposure of the display information in the private frame buffer to the OS when hidden mode is inactive; or
the display information being directly provided from the private frame buffer to the GPU when hidden mode is active.

15. The computing device of claim 14 , wherein the computing device further comprises a dedicated switch selectable to activate or inactivate the hidden mode.

16. The computing device of claim 15 , wherein the physical memory is a random-access memory (RAM).

Assignees

• Hewlett Packard Development Co

Inventors

• Campos Mario E
• Jabori Monji G
• Rawlings Scott
• Thai Thong

Classifications

• G09G5/14

  Display of multiple viewports · CPC title

• G09G5/391

  Resolution modifying circuits, e.g. variable screen formats · CPC title

• G09G2340/145

  related to small screens · CPC title

• G06F3/1431

  using a single graphics controller · CPC title

• G09G5/42 Primary

  characterised by the display of patterns using a display memory without fixed position correspondence between the display memory contents and the display position on the screen · CPC title