Programmable gate driver control in USB power delivery

Patent metadata

Field	Value
Publication number	US-11101673-B2
Application number	US-201815983895-A
Country	US
Kind code	B2
Filing date	May 18, 2018
Priority date	Mar 13, 2018
Publication date	Aug 24, 2021
Grant date	Aug 24, 2021

Abstract

Techniques for control of power switches in a USB Power Delivery (USB-PD) system are described herein. In an example embodiment, an integrated circuit comprises a programmable gate control circuit coupled to a provider field effect transistor (FET) and a consumer FET to provide control signals to the provider and consumer FETs in response to system conditions and application requirements of the USB-PD system. A pulldown current control circuit may provide additional control to slew rate for the slow turn-ON of provider and consumer FETs.

First claim

What is claimed is:

1. A universal serial bus (USB) power delivery circuit comprising:
a provider field effect transistor (FET) comprising:
a source coupled to a first terminal,
a drain coupled to a second terminal,
a control terminal, and
a passive pull-up circuit coupled between the first terminal and the control terminal, the passive pull-up circuit for disabling the provider FET in a normal operation, wherein normal operation occurs in the absence of a fault condition;

a gate driver coupled to the control terminal of the provider FET for providing control signals to the control terminal, wherein the gate driver is programmable by control logic to provide control signals in response to system conditions, the control signals selected from a predetermined set of control signals corresponding to predetermined performance of the provider FET.

2. The USB power delivery circuit of claim 1 , wherein the gate driver comprises an active pull-up circuit activated in response to a signal from a fault detection circuit.

3. The USB power delivery circuit of claim 2 , wherein the fault detection circuit is configured to detect fault conditions that include at least one of an over-voltage condition, an over-current condition, and under-voltage condition, and a reverse current condition.

4. The USB power delivery circuit of claim 1 , wherein the passive pull-up circuit is for deactivating the provider FET when the gate driver is disabled.

5. The USB power delivery circuit of claim 1 , wherein the system conditions comprise at least one fault condition.

6. The USB power delivery circuit of claim 1 , wherein an output of the gate driver is controlled with a digital signal.

7. The USB power delivery circuit of claim 1 , wherein the digital signal is provided by a pulse-width modulated signal to control current through the provider FET.

8. The USB power delivery circuit of claim 1 , wherein an output of the gate driver is controlled with an analog signal.

9. The USB power delivery circuit of claim 8 , wherein the analog signal is a current.

10. A circuit for universal serial bus (USB) power delivery comprising:
a first gate driver coupled to a first gate of a provider field effect transistor (FET), the first gate driver comprising an active pull-up circuit, and the provider FET comprising a passive pull-up circuit coupled between the first gate and a source terminal of the provider FET, the passive pull-up circuit for disabling the provider FET in a normal operation, wherein normal operation occurs in the absence of a fault condition; and
a second gate driver coupled to a second gate of a consumer FET,
wherein the first and second gate drivers comprise current control circuitry for providing analog control, and
wherein the first and second gate drivers receive control signals from a control logic block, the control signals selected from a predetermined set of control signals corresponding to predetermined performance of the provider FET and the consumer FET.

11. The circuit for universal serial bus (USB) power delivery of claim 10 , wherein the second gate driver comprises:
a first FET gate driver comprising a drain coupled to a gate of the provider FET and a source; and
a pulldown current control circuit coupled to the source,
wherein the pulldown current control circuit is configured to alter a pulldown current on the first gate driver and the first PFET driver in response to control signals from a control circuit.

12. The circuit for USB power delivery of claim 11 , wherein control signals from the control circuit correspond to a pulse-width modulation for digital control.

13. The circuit for USB power delivery of claim 11 , wherein control signals from the control circuit correspond to a current signal for analog control.

14. The circuit for USB power delivery of claim 10 , wherein the control circuit provides control signals to the first gate driver in response to a fault condition.

15. The circuit for USB power delivery of claim 10 , wherein:
the provider FET is coupled between a bulk capacitor and an output node; and
the consumer FET is coupled between a charging circuit and the output node.

16. A universal serial bus (USB) power delivery system comprising:
at least one voltage threshold detection module;
a fault detection module;
a first gate driver circuit, the first gate driver circuit coupled to a gate terminal of a first field effect transistor (FET), the gate terminal coupled to a passive pull-up circuit coupled to a source terminal of the first FET, the passive pull-up circuit for disabling the first FET in a normal operation, wherein normal operation occurs in the absence of a fault condition;
a second gate driver circuit; and
control logic for receiving signals from the at least one voltage threshold detection module and fault detection module and for providing control signals to the first and second gate driver circuits, the control signals for programming the first and second gate driver circuits with predetermined values corresponding to predetermined performance of the first FET coupled to the first gate driver circuit and a second FET coupled to the second gate driver circuit.

17. The USB power delivery system of claim 16 , further comprising a fault response control module coupled to an output of the fault detection module and an input of the control logic.

18. The USB power delivery system of claim 16 , further comprising a current sense detection module coupled to an input of the programmable fault detector.

19. The USB power delivery system of claim 16 , wherein the at least one voltage threshold detection module comprises:
a first voltage threshold detector module coupled to a first node of a provider FET corresponding to the first FET; and
a second voltage threshold detector module coupled to a second node of the provider FET, the second node of the provider FET coupled to an output node of the USB power delivery system.

20. The USB power delivery system of claim 16 , wherein the first gate driver circuit comprises an active pullup circuit.

21. The USB power delivery system of claim 16 , further comprising a pulldown current control circuit coupled to the control logic, the pulldown current control circuit for providing a variable pulldown current to the first gate driver circuit and the second gate driver circuit in response to control signals from the control logic.

22. The USB power delivery system of claim 16 , wherein the first gate driver circuit and the second gate driver circuit comprise NFETs.

Assignees

• Cypress Semiconductor Corp

Inventors

• Mattos Derwin
• Khodabandehlou Hamid
• Gupta Sumeet
• Raza Syed
• Nayak Anup

Classifications

• H02J7/42

  with electronic devices having internal batteries, e.g. mobile phones · CPC title

• H02J7/68

  using circuits for correcting or protecting against reverse-polarity · CPC title

• H02J7/62

  against overcurrent · CPC title

• H02J7/64 Primary

  against overvoltage · CPC title

• H02J7/00

  Circuit arrangements for charging or discharging batteries or for supplying loads from batteries · CPC title