Dynamic biasing circuits for low drop out (LDO) regulators
US-9710002-B2 · Jul 18, 2017 · US
US11086343B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11086343-B2 |
| Application number | US-201916690074-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 20, 2019 |
| Priority date | Nov 20, 2019 |
| Publication date | Aug 10, 2021 |
| Grant date | Aug 10, 2021 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A method of regulating a low-dropout (LDO) regulator is provided. The method includes: generating a feedback voltage by receiving a feedback from an output node of the LDO regulator, generating a control signal to drive a pass element by receiving the feedback voltage and a reference voltage, detecting a voltage at a first node and controlling a switching operation of a first switch according to a detection result by a detection circuit. When the LDO regulator is operating in an active mode, the first switch is turned on to connect the first node and a control terminal of the pass element and when the LDO regulator is operating in a standby mode, the first switch is turned off to disconnect the first node from the control terminal of the pass element. A low-dropout (LDO) regulator is also provided.
Opening claim text (preview).
What is claimed is: 1. A low-dropout (LDO) regulator comprising: a pass element, connected between a power supply voltage and an output node of the LDO regulator; a feedback circuit, configured to receive a feedback from the output node and generates a feedback voltage; an error amplifier, configured to receive the feedback voltage and a reference voltage to generate a control signal to drive the pass element; a compensation capacitor, comprising a first terminal and a second terminal, wherein the first terminal is coupled to a first node and the second terminal is coupled to the output node of the LDO regulator; and a detection circuit, configured to detect a voltage at the first node and controls a first switch according to a detection result, wherein when the LDO regulator is operating in an active mode, the first switch is turned on to connect the first node and a control terminal of the pass element and when the LDO regulator is operating in a standby mode, the first switch is turned off to disconnect the first node from the control terminal of the pass element. 2. The LDO regulator of claim 1 , wherein the first switch is coupled between the first node and the control terminal of the pass element. 3. The LDO regulator of claim 1 , further comprising: a driver circuit, configured to charge and discharge the first node; and a second switch, configured to connect the driver circuit and the first node. 4. The LDO regulator of claim 3 , wherein when the first switch changes from turn on to turn off, a transition detection pulse is generated to initialize the first node with a first predetermined voltage by the driver circuit. 5. The LDO regulator of claim 4 , wherein when the transition detection pulse is generated, the detection circuit compares a voltage at the first node and the first predetermined voltage. 6. The LDO regulator of claim 5 , wherein when the voltage at the first node is higher than the first predetermined voltage, the driver circuit discharges the first node. 7. The LDO regulator of claim 5 , wherein when the voltage at the first node is lower than the first predetermined voltage, the driver circuit charges the first node. 8. The LDO regulator of claim 7 , wherein the driver circuit comprises a diode connected PMOS configured to charge the first node to the first predetermined voltage during charging. 9. The LDO regulator of claim 8 , wherein the detection circuit is coupled to the driver circuit to detect a voltage of the diode connected PMOS. 10. A method of regulating a low-dropout (LDO) regulator comprising: generating a feedback voltage by receiving a feedback from an output node of the LDO regulator; generating a control signal to drive a pass element by receiving the feedback voltage and a reference voltage; and detecting a voltage at a first node and controlling a switching operation of a first switch according to a detection result by a detection circuit, wherein a first terminal of a compensation capacitor of the LDO regulator is coupled to the first node and a second terminal of the compensation capacitor of the LDO regulator is coupled to the output node, wherein when the LDO regulator is operating in an active mode, the first switch is turned on to connect the first node and a control terminal of the pass element and when the LDO regulator is operating in a standby mode, the first switch is turned off to disconnect the first node from the control terminal of the pass element. 11. The method of claim 10 , wherein the first switch is coupled between the first node and the control terminal of the pass element. 12. The method of claim 10 , further comprising: perform a charging operation and a discharging operation on the first node. 13. The method of claim 12 , wherein when the first switch changes from turn on to turn off, a transition detection pulse is generated to initialize the first node with a first predetermined voltage by the driver circuit. 14. The method of claim 13 , wherein when the transition detection pulse is generated, the detection circuit compares a voltage at the first node and the first predetermined voltage. 15. The method of claim 14 , wherein when the voltage at the first node is higher than the first predetermined voltage, the driver circuit discharges the first node. 16. The method of claim 14 , wherein when the voltage at the first node is lower than the first predetermined voltage, the driver circuit charges the first node. 17. The method of claim 16 , wherein the driver circuit comprises a diode connected PMOS configured to charge the first node to the first predetermined voltage during charging. 18. The method of claim 17 , wherein the detection circuit is coupled to the driver circuit to detect a voltage of the diode connected PMOS.
sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor (G05F1/563 takes precedence) · CPC title
characterised by reference voltage circuitry, e.g. soft start, remote shutdown · CPC title
using semiconductor devices in series with the load as final control devices (G05F1/461 takes precedence) · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.