Multilayer ceramic capacitor with copper oxide layer and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-11081282-B2
Application number	US-201916410914-A
Country	US
Kind code	B2
Filing date	May 13, 2019
Priority date	May 18, 2018
Publication date	Aug 3, 2021
Grant date	Aug 3, 2021

Abstract

A multilayer ceramic capacitor includes: a multilayer chip in which dielectric layers mainly composed of ceramic and internal electrode layers are alternately stacked so that the internal electrode layers are alternately exposed to two end faces, which face each other, of the multilayer chip, the multilayer chip having a substantially rectangular parallelepiped shape; and a pair of external electrodes formed from the two end faces of the multilayer chip to at least one side face of side faces of the multilayer chip, wherein each of the pair of external electrodes includes a metal layer and an oxide layer, the metal layer being formed from the end face to the at least one side face and being mainly composed of copper, the oxide layer covering at least a part of the metal layer, being mainly composed of copper oxide, and having a maximum thickness of 0.5 μm or greater.

First claim

What is claimed is:

1. A multilayer ceramic capacitor comprising:
a multilayer chip in which dielectric layers mainly composed of ceramic and internal electrode layers are alternately stacked so that the internal electrode layers are alternately exposed to two end faces of the multilayer chip, the multilayer chip having a substantially rectangular parallelepiped shape, the two end faces facing each other; and
a pair of external electrodes formed from the two end faces of the multilayer chip to at least one side face of side faces of the multilayer chip,
wherein each of the pair of external electrodes includes a metal layer, an oxide layer, and a plated layer, the metal layer being formed from the end face to the at least one side face and being mainly composed of copper, the oxide layer covering at least a part of the metal layer, being mainly composed of copper oxide, and having a maximum thickness of 0.5 μm or greater, the oxide layer being interposed between the metal layer and the plated layer in a thickness direction of the metal layer and the plated layer,
wherein a coverage on the at least one side face is 20% or greater and is higher than a coverage on the end face, the coverage being defined as a proportion of an area of the oxide layer formed on the metal layer per unit area of the metal layer.

2. The multilayer ceramic capacitor according to claim 1 , wherein
the oxide layer extends closer to a center of the multilayer chip than the metal layer in a direction in which the two end faces of the multilayer chip face each other, and is in contact with the at least one side face.

3. A method of manufacturing a multilayer ceramic capacitor, the method comprising:
forming a ceramic multilayer structure having a substantially parallelepiped shape by alternately stacking ceramic dielectric green sheets and conductive pastes for forming internal electrode layers and alternately exposing the conductive pastes to two end faces, which face each other, of the ceramic multilayer structure;
coating the ceramic multilayer structure with a metal paste mainly composed of copper;
baking the metal paste to form a metal layer;
forming an oxide layer that covers at least a part of the metal layer, is mainly composed of copper oxide, and has a maximum thickness of 0.5 μm or greater by oxidizing the metal layer so that a coverage on the at least one side face is 20% or greater and is higher than a coverage on the end face, the coverage being defined as a proportion of an area of the oxide layer formed on the metal layer per unit area of the metal layer; and
forming a plated layer so that the oxide layer is interposed between the metal layer and the plated layer in a thickness direction of the metal layer and the plated layer.

4. A method of manufacturing a multilayer ceramic capacitor, the method comprising:
forming a ceramic multilayer structure having a substantially parallelepiped shape by alternately stacking ceramic dielectric green sheets and conductive pastes for forming internal electrode layers and alternately exposing the conductive pastes to two end faces, which face each other, of the ceramic multilayer structure;
coating the ceramic multilayer structure with a metal paste mainly composed of copper;
firing the ceramic multilayer structure with the metal paste to form a metal layer;
forming an oxide layer that covers at least a part of the metal layer, is mainly composed of copper oxide, and has a maximum thickness of 0.5 μm or greater by oxidizing the metal layer so that a coverage on the at least one side face is 20% or greater and is higher than a coverage on the end face, the coverage being defined as a proportion of an area of the oxide layer formed on the metal layer per unit area of the metal layer; and
forming a plated layer so that the oxide layer is interposed between the metal layer and the plated layer in a thickness direction of the metal layer and the plated layer.

5. A multilayer ceramic capacitor comprising:
a multilayer chip in which dielectric layers mainly composed of ceramic and internal electrode layers are alternately stacked so that the internal electrode layers are alternately exposed to two end faces of the multilayer chip, the multilayer chip having a substantially rectangular parallelepiped shape, the two end faces facing each other; and
a pair of external electrodes formed from the two end faces of the multilayer chip to at least one side face of side faces of the multilayer chip,
wherein each of the pair of external electrodes includes a metal layer, an oxide layer, and a plated layer, the metal layer being formed from the end face to the at least one side face and being mainly composed of copper, the oxide layer covering at least a part of the metal layer, being mainly composed of copper oxide, and having a maximum thickness of 0.5 μm or greater, the oxide layer being interposed between the metal layer and the plated layer in a thickness direction of the metal layer and the plated layer,
wherein the oxide layer extends closer to a center of the multilayer chip than the metal layer in a direction in which the two end faces of the multilayer chip face each other, and is in contact with the at least one side face,
wherein on the at least one side face, a coverage that is defined as a proportion of an area of the oxide layer formed on the metal layer per unit area of the metal layer is 20% or greater.

Assignees

• Taiyo Yuden Kk

Inventors

• Nakamura Tomoaki
• Tahara Mikio
• Kanou Masako
• Sato Fusao

Classifications

• H01G4/30 Primary

  Stacked capacitors (H01G4/33 takes precedence) · CPC title

• H01G4/012

  Form of non-self-supporting electrodes · CPC title

• H01G4/1227

  based on alkaline earth titanates · CPC title

• H01G4/2325

  characterised by the material of the terminals · CPC title

• H01G4/228

  Terminals · CPC title