Oscillator, electronic apparatus and vehicle

US11070212B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11070212-B2
Application numberUS-202016809186-A
CountryUS
Kind codeB2
Filing dateMar 4, 2020
Priority dateMar 5, 2019
Publication dateJul 20, 2021
Grant dateJul 20, 2021

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

Provided is an oscillator including: a first resonator; a second resonator; a first oscillation circuit generating a first oscillation signal by oscillating the first resonator; a second oscillation circuit generating a second oscillation signal that has frequency-temperature characteristics different from frequency-temperature characteristics of the first oscillation signal by oscillating the second resonator; a clock signal generation circuit generating a clock signal with a frequency that is temperature compensated by temperature compensation data; and a processing circuit performing time digital conversion processing based on the first oscillation signal and the second oscillation signal, and obtaining the temperature compensation data based on measurement data of the time digital conversion processing.

First claim

Opening claim text (preview).

What is claimed is: 1. An oscillator comprising: a first resonator; a second resonator; a first oscillation circuit generating a first oscillation signal by oscillating the first resonator; a second oscillation circuit generating a second oscillation signal that has frequency-temperature characteristics different from frequency-temperature characteristics of the first oscillation signal by oscillating the second resonator; a clock signal generation circuit generating a clock signal with a frequency that is temperature compensated by temperature compensation data; and a processing circuit performing time digital conversion processing based on the first oscillation signal and the second oscillation signal, and obtaining the temperature compensation data based on measurement data of the time digital conversion processing, wherein the processing circuit performs first time digital conversion processing for measuring a first time difference between a first edge timing and a second edge timing of the first oscillation signal, performs second time digital conversion processing for measuring a second time difference between a third edge timing and a fourth edge timing of the second oscillation signal, and obtains the temperature compensation data using data corresponding to a difference between the first time difference and the second time difference as the measurement data. 2. The oscillator according to claim 1 , further comprising: a storage unit storing information on a learned model that is machine-learned to output data corresponding to the temperature compensation data with respect to input data, wherein the processing circuit obtains the temperature compensation data by performing processing based on the information on the learned model using the measurement data as the input data. 3. The oscillator according to claim 2 , wherein the processing circuit includes a time digital conversion circuit that receives the first oscillation signal and the second oscillation signal, and performs the time digital conversion processing, and a calculation circuit that receives the measurement data from the time digital conversion circuit as the input data, and obtains the temperature compensation data based on the information on the learned model, the processing circuit outputs setting data corrected by the temperature compensation data to the clock signal generation circuit, and the clock signal generation circuit generates the clock signal based on the setting data. 4. The oscillator according to claim 1 , wherein the processing circuit includes a first time digital converter that performs the first time digital conversion processing, and a second time digital converter that performs the second time digital conversion processing. 5. The oscillator according to claim 1 , wherein the processing circuit executes the first time digital conversion processing and the second time digital conversion processing in a time division manner. 6. The oscillator according to claim 1 , wherein the clock signal generation circuit includes a fractional N-type PLL circuit, and the processing circuit outputs division ratio setting data corrected by the temperature compensation data to a dividing circuit included in the PLL circuit. 7. The oscillator according to claim 1 , wherein the clock signal generation circuit includes a direct digital synthesizer, and the processing circuit outputs frequency setting data corrected by the temperature compensation data to the direct digital synthesizer. 8. The oscillator according to claim 1 , wherein the clock signal generation circuit includes a D/A conversion circuit that D/A converts frequency setting data and outputs a control voltage of a frequency, and a voltage controlled oscillation circuit that oscillates based on the control voltage from the D/A conversion circuit, and the processing circuit outputs the frequency setting data corrected by the temperature compensation data to the D/A conversion circuit. 9. An electronic apparatus comprising: the oscillator according to claim 1 ; and a processing device that operates based on the clock signal from the oscillator. 10. A vehicle comprising: the oscillator according to claim 1 ; and a processing device that operates based on the clock signal from the oscillator. 11. An oscillator comprising: a first resonator; a second resonator; a first oscillation circuit generating a first oscillation signal by oscillating the first resonator; a second oscillation circuit generating a second oscillation signal that has frequency-temperature characteristics different from frequency-temperature characteristics of the first oscillation signal by oscillating the second resonator; a clock signal generation circuit generating a clock signal with a frequency that is temperature compensated by temperature compensation data; and a processing circuit performing time digital conversion processing based on the first oscillation signal and the second oscillation signal, and obtaining the temperature compensation data based on measurement data of the time digital conversion processing, wherein the processing circuit performs first time digital conversion processing for measuring a first time difference between a first edge timing and a second edge timing of the first oscillation signal, performs second time digital conversion processing for measuring a second time difference between a third edge timing and a fourth edge timing of the second oscillation signal, and obtains the temperature compensation data using the first time difference data and the second time difference data as the measurement data.

Assignees

Inventors

Classifications

  • Supervised learning · CPC title

  • Feedforward networks · CPC title

  • using kernel methods, e.g. support vector machines [SVM] · CPC title

  • G06F1/04Primary

    Generating or distributing clock signals or signals derived directly therefrom · CPC title

  • Digital/analogue converters ({H03M1/001 – } H03M1/10 take precedence) · CPC title

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What does patent US11070212B2 cover?
Provided is an oscillator including: a first resonator; a second resonator; a first oscillation circuit generating a first oscillation signal by oscillating the first resonator; a second oscillation circuit generating a second oscillation signal that has frequency-temperature characteristics different from frequency-temperature characteristics of the first oscillation signal by oscillating the …
Who is the assignee on this patent?
Seiko Epson Corp
What technology area does this patent fall under?
Primary CPC classification G06F1/04. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jul 20 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).