Driving circuit, display panel, driving method and display device

Patent metadata

Field	Value
Publication number	US-11069298-B2
Application number	US-202016815408-A
Country	US
Kind code	B2
Filing date	Mar 11, 2020
Priority date	Oct 21, 2019
Publication date	Jul 20, 2021
Grant date	Jul 20, 2021

Abstract

A driving circuit, a display panel, a driving method and a display device. The driving circuit includes a pixel circuit and a plurality of light emitting devices; the pixel circuit includes: a data control circuit, a light emitting control circuit and a driving transistor, wherein at least two light emitting devices share the same pixel circuit, and thus, the light emitting devices is driven by the pixel circuit to emit light; and due to the effect of the light emitting control circuit, the light emitting devices can be controlled to emit light in a time-sharing manner.

First claim

The invention claimed is:

1. A driving circuit, comprising: a pixel circuit and a plurality of light emitting devices; the pixel circuit comprises: a data control circuit, a light emitting control circuit and a driving transistor, wherein
the data control circuit is configured to supply a signal of a data signal terminal to a gate of the driving transistor under signal control of a scanning signal terminal, and supply a signal of a reference voltage signal terminal to the gate of the driving transistor under signal control of a reset signal terminal;
the light emitting control circuit is configured to electrically connect the plurality of light emitting devices to a second electrode of the driving transistor in a time-sharing manner under signal control of a plurality of light emitting control signal terminals; and
a first electrode of the driving transistor is electrically connected with a power voltage terminal;
wherein the scanning signal terminal comprises a first subscanning signal terminal and a second subscanning signal terminal; and the data control circuit comprises: a first switching transistor, a second switching transistor, a third switching transistor and a first capacitor;
a first terminal of the first switching transistor is electrically connected to the data signal terminal, a control terminal of the first switching transistor is electrically connected to the first subscanning signal terminal, and a second terminal of the first switching transistor is electrically connected to the gate of the driving transistor;
a first terminal of the second switching transistor is electrically connected to the data signal terminal, a control terminal of the second switching transistor is electrically connected to the second subscanning signal terminal, and a second terminal of the second switching transistor is electrically connected to the gate of the driving transistor;
a first terminal of the third switching transistor is electrically connected to the gate of the driving transistor, a control terminal of the third switching transistor is electrically connected to the reset signal terminal, and a second terminal of the third switching transistor is directly connected to the reference voltage signal terminal; and
a first terminal of the first capacitor is electrically connected to the gate of the driving transistor, and a second terminal of the first capacitor is directly connected to the reference voltage signal terminal.

2. The driving circuit according to claim 1 , wherein the data control circuit comprises: a fourth switching transistor, a fifth switching transistor and a second capacitor, wherein
a first terminal of the fourth switch transistor is electrically connected to the data signal terminal, a control terminal of the fourth switch transistor is electrically connected to the scanning signal terminal, and a second terminal of the fourth switch transistor is electrically connected to the gate of the driving transistor;
a first terminal of the fifth switching transistor is electrically connected to the gate of the driving transistor, a control terminal of the fifth switching transistor is electrically connected to the reset signal terminal, and a second terminal of the fifth switching transistor is electrically connected to the reference voltage signal terminal; and
a first terminal of the second capacitor is electrically connected to the gate of the driving transistor, and a second terminal of the second capacitor is electrically connected to the reference voltage signal terminal.

3. The driving circuit according to claim 1 , wherein the light emitting control circuit comprises a plurality of light emitting control transistors, wherein the plurality of light-emitting control transistors correspond to the plurality of light emitting devices in one-to-one manner, and the plurality of light emitting control transistors correspond to the plurality of light emitting control signal terminals in one-to-one manner; and
a first terminal of the plurality of light emitting control transistors is electrically connected to a second electrode of the driving transistor, a second terminal of the plurality of light emitting control transistors is electrically connected to a corresponding light emitting device, and a control terminal of the plurality of light emitting control transistors is electrically connected to a corresponding light emitting control signal terminal.

4. A display panel, comprising a plurality of sub-pixels arranged in an array; the plurality of sub-pixels are divided into a plurality of sub-pixel groups; the plurality of sub-pixel groups are provided correspondingly in one-to-one manner with the driving circuit according to claim 1 ; and
a sub-pixel of the plurality of sub-pixel groups is correspondingly in one-to-one manner provided with a light emitting device in the driving circuit.

5. The display panel according to claim 4 , wherein the plurality of sub-pixels comprise first-color sub-pixels, second-color sub-pixels and third-color sub-pixels; and
in every two adjacent sub-pixel columns, the second-color sub-pixels in one sub-pixel column are sequentially arranged, and the first-color sub-pixels and the third-color sub-pixels are alternately arranged in other sub-pixel column.

6. The display panel according to claim 4 , wherein the plurality of sub-pixel group comprise at least two sub-pixels adjacent to each other in a column direction of the sub-pixels; or
the plurality of sub-pixel groups comprise at least two sub-pixels adjacent to each other in a row direction of the sub-pixels.

7. The display panel according to claim 4 , wherein the data control circuit comprises: a fourth switching transistor, a fifth switching transistor and a second capacitor, wherein
a first terminal of the fourth switch transistor is electrically connected to the data signal terminal, a control terminal of the fourth switch transistor is electrically connected to the scanning signal terminal, and a second terminal of the fourth switch transistor is electrically connected to the gate of the driving transistor;
a first terminal of the fifth switching transistor is electrically connected to the gate of the driving transistor, a control terminal of the fifth switching transistor is electrically connected to the reset signal terminal, and a second terminal of the fifth switching transistor is electrically connected to the reference voltage signal terminal; and
a first terminal of the second capacitor is electrically connected to the gate of the driving transistor, and a second terminal of the second capacitor is electrically connected to the reference voltage signal terminal.

8. The display panel according to claim 4 , wherein the light emitting control circuit comprises a plurality of light emitting control transistors, wherein the plurality of light-emitting control transistors correspond to the plurality of light emitting devices in one-to-one manner, and plurality of light emitting control transistors correspond to the plurality of light emitting control signal terminals in one-to-one manner; and
a first terminal of the plurality of light emitting control transistors is electrically connected to a second electrode of the driving transistor, a second terminal of the plurality of light emitting control transistors is electrically connected to a corresponding light emitting device, and a control terminal of the plurality of light emitting control transistors is electrically connected to a corresponding light emitting control signal terminal.

9. A display device, comprising the display panel according to claim 4 .

10. The display device according to claim 9 , wherein the data control circuit comprises: a fourth sw

Assignees

• Boe Technology Group Co Ltd

Inventors

• Xuan Minghua
• Xiao Li

Classifications

• G09G3/3233 Primary

  with pixel circuitry controlling the current through the light-emitting element · CPC title

• G09G3/3225 Primary

  using an active matrix · CPC title

• G09G2300/0861

  with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes · CPC title

• G09G2300/0842

  forming a memory circuit, e.g. a dynamic memory with one capacitor · CPC title

• G09G2300/0452

  Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components · CPC title