Pixel unit circuit, method of driving the same, pixel circuit and display device

Patent metadata

Field	Value
Publication number	US-2020105196-A1
Application number	US-201816622719-A
Country	US
Kind code	A1
Filing date	Aug 2, 2018
Priority date	Aug 3, 2017
Publication date	Apr 2, 2020
Grant date	—

Abstract

A pixel unit circuit, a method of driving the same, a pixel circuit and a display device are provided. A pixel unit circuit includes a light-emitting component, a driving transistor, a data writing circuit and a storage capacitor circuit. The data writing circuit is coupled to a data line, a gate line and a gate electrode of the driving transistor, and configured to, under a control of the gate line, enable a connection between the data line and the gate electrode of the driving transistor to be turned on or off. A first end of the storage capacitor circuit is coupled to the gate electrode of the driving transistor, and a second end of the storage capacitor circuit is coupled to a reference voltage input terminal. A second end of the light-emitting component is coupled to a low-level input terminal.

First claim

1 . A pixel unit circuit, comprising a light-emitting component, a driving transistor, a data writing circuit and a storage capacitor circuit, wherein
a drain electrode of the driving transistor is coupled to a high-level input terminal, a source electrode of the driving transistor is coupled to a first end of the light-emitting component, the driving transistor is an n-type transistor; the data writing circuit is coupled to a data line, a gate line and a gate electrode of the driving transistor, and configured to, under a control of the gate line, enable a connection between the data line and the gate electrode of the driving transistor to be turned on or off; a first end of the storage capacitor circuit is coupled to the gate electrode of the driving transistor, and a second end of the storage capacitor circuit is coupled to a reference voltage input terminal; a second end of the light-emitting component is coupled to a low-level input terminal; a source electrode voltage of the driving transistor varies with a gate electrode potential of the driving transistor.

2 . The pixel unit circuit according to claim 1 , further comprising a reset circuit, wherein
the reset circuit is coupled to a reset terminal, the reference voltage input terminal and the gate electrode of the driving transistor, and configured to, under a control of the reset terminal, enable a connection between the gate electrode of the driving transistor and the reference voltage input terminal to be turned on or off.

3 . The pixel unit circuit according to claim 2 , wherein the reset circuit comprises a reset transistor, a gate electrode of the reset transistor is coupled to the reset terminal, a first electrode of the reset transistor is coupled to the gate electrode of the driving transistor, a second electrode of the reset transistor is coupled to the reference voltage input terminal, the reset transistor is an n-type transistor or a p-type transistor.

4 . The pixel unit circuit according to claim 1 , wherein the gate line comprises a first gate line and a second gate line;
the data writing circuit comprises: a first data writing transistor, wherein a gate electrode of the first data writing transistor is coupled to the first gate line, a first electrode of the first data writing transistor is coupled to the data line, a second electrode of the first data writing transistor is coupled to the gate electrode of the driving transistor; and a second data writing transistor, wherein a gate electrode of the second data writing transistor is coupled to the second gate line, a first electrode of the second data writing transistor is coupled to the gate electrode of the driving transistor, a second electrode of the second data writing transistor is coupled to the data line; the first data writing transistor is an n-type transistor, and the second data writing transistor is a p-type transistor.

5 . The pixel unit circuit according to claim 2 , wherein the gate line comprises a first gate line and a second gate line;
the data writing circuit comprises: a first data writing transistor, wherein a gate electrode of the first data writing transistor is coupled to the first gate line, a first electrode of the first data writing transistor is coupled to the data line, a second electrode of the first data writing transistor is coupled to the gate electrode of the driving transistor; and a second data writing transistor, wherein a gate electrode of the second data writing transistor is coupled to the second gate line, a first electrode of the second data writing transistor is coupled to the gate electrode of the driving transistor, a second electrode of the second data writing transistor is coupled to the data line; the first data writing transistor is an n-type transistor, and the second data writing transistor is a p-type transistor.

6 . The pixel unit circuit according to claim 3 , wherein the gate line comprises a first gate line and a second gate line;
the data writing circuit comprises: a first data writing transistor, wherein a gate electrode of the first data writing transistor is coupled to the first gate line, a first electrode of the first data writing transistor is coupled to the data line, a second electrode of the first data writing transistor is coupled to the gate electrode of the driving transistor; and a second data writing transistor, wherein a gate electrode of the second data writing transistor is coupled to the second gate line, a first electrode of the second data writing transistor is coupled to the gate electrode of the driving transistor, a second electrode of the second data writing transistor is coupled to the data line; the first data writing transistor is an n-type transistor, and the second data writing transistor is a p-type transistor.

7 . The pixel unit circuit according to claim 4 , wherein an absolute value of a threshold voltage of the first data writing transistor is equal to an absolute value of a threshold voltage of the second data writing transistor.

8 . The pixel unit circuit according to claim 1 , wherein the storage capacitor circuit comprises a storage capacitor, wherein a first end of the storage capacitor is coupled to the gate electrode of the driving transistor and a second end of the storage capacitor is coupled to the reference voltage input terminal.

9 . The pixel unit circuit according to claim 1 , wherein the light-emitting component comprises an organic light-emitting diode, the first end of the light-emitting component is an anode of the organic light-emitting diode, and the second end of the light-emitting component is a cathode of the organic light-emitting diode.

10 . A method of driving the pixel unit circuit according to claim 1 , comprising: in each display period,
in a light-emitting phase, under a control of the gate line, enabling by the data writing circuit a connection between the data line and the gate electrode of the driving transistor to be turned on, to enable the driving transistor to work in a constant-current region to drive the light-emitting component to emit light, wherein a source electrode voltage of the driving transistor varies with a gate electrode potential of the driving transistor.

11 . The method according to claim 10 , wherein each display period further comprises a resetting phase, the method further comprises:
in the resetting phase, under the control of the gate line, enabling by the data writing circuit the connection between the data line and the gate electrode of the driving transistor to be turned off; under a control of a reset terminal, enabling by a resetting circuit a connection between the gate electrode of the driving transistor and the reference voltage input terminal to be turned on; in the light-emitting phase, under the control of the reset terminal, enabling by the resetting circuit the connection between the gate electrode of the driving transistor and the reference voltage input terminal to be turned off.

12 . The method according to claim 11 , wherein the reference voltage input terminal is configured to input a reference voltage;
a difference between the reference voltage and a threshold voltage of the driving transistor is smaller than a sum value of a low level input by the low-level input terminal and a light-up voltage of the light-emitting component.

13 . The method according to claim 11 , wherein the gate line comprises a first gate line and a second gate line, and the data writing circuit comprises:
a first data writing transistor, wherein a gate electrode of the first data writing transistor is coupled to the first gate line; a second data writing transisto

Assignees

• Boe Technology Group Co Ltd

Inventors

• Xuan Minghua
• Chen Xiaochuan
• Yang Shengji

Classifications

• G09G3/3258 Primary

  with pixel circuitry controlling the voltage across the light-emitting element · CPC title

• G09G2320/0626

  for control of overall brightness · CPC title

• G09G2300/0842

  forming a memory circuit, e.g. a dynamic memory with one capacitor · CPC title

• G09G3/3291

  in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements · CPC title

• G09G3/3241 Primary

  the current through the light-emitting element being set using a data current provided by the data driver, e.g. by using a two-transistor current mirror · CPC title