Optical chip ID definition using nanoimprint lithography

Patent metadata

Field	Value
Publication number	US-11056439-B2
Application number	US-201916573530-A
Country	US
Kind code	B2
Filing date	Sep 17, 2019
Priority date	Mar 29, 2018
Publication date	Jul 6, 2021
Grant date	Jul 6, 2021

Abstract

An optically readable chip ID is provided to an imprintable material that is formed as a last level of an integrated circuit (IC) chip using nanoimprint lithography. The nanoimprint lithography process provides an array of indentations into the imprintable material that is typically arranged in a hexadecimal pattern. The hexadecimal pattern includes one or more optically readable characters which combine to encode chip location identification data. The chip location identification data identifies a unique location of the product chip on a wafer prior to dicing.

First claim

What is claimed is:

1. A semiconductor device comprising:
an imprinted material as a last level of an integrated circuit chip and containing indentations disposed therein, wherein the indentations in the imprinted material collectively form a code containing numbers, alphabetic letters or numbers and alphabetic letters, and the code is an optically readable ID.

2. The semiconductor device of claim 1 , wherein the imprinted material is composed of a cured thermoset polymer.

3. The semiconductor device of claim 2 , wherein the thermoset polymer is a polyimide.

4. The semiconductor device of claim 1 , wherein the optically readable ID has a hexadecimal pattern.

5. The semiconductor device of claim 1 , wherein the optically readable ID is permanent.

6. The semiconductor device of claim 1 , wherein the imprinted material containing the optically readable ID is located directly above an area of the integrated circuit chip in which bond pads are absent.

7. The semiconductor device of claim 1 , wherein the optically readable ID is a base 10 code.

8. The semiconductor device of claim 1 , wherein the optically readable ID encodes chip location identification data for a product chip.

9. The semiconductor device of claim 8 , wherein the chip location identification data includes a wafer ID that identifies a parent wafer of the product chip.

10. The semiconductor device of claim 8 , wherein the chip location identification data includes “X” and “Y” wafer coordinates that identify the location on a parent wafer surface where the product chip originated.

11. The semiconductor device of claim 1 , wherein the optically readable chip ID is present a chip corner.

12. The semiconductor device of claim 1 , wherein the optically readable chip ID is present in an electrically inactive central portion of the chip.

13. The semiconductor device of claim 1 , wherein the optically readable chip ID is present in a peripheral region of the chip.

14. A semiconductor device comprising:
an imprinted material as a last level of an integrated circuit chip and containing an optically readable ID disposed therein, and wherein the optically readable ID comprises indentations present in the imprinted material that provide a hexadecimal pattern to the imprinted material.

Assignees

• IBM

Inventors

• Piper Daniel

Classifications

• H10W46/401

  for identification or tracking · CPC title

• H10W46/103

  alphanumeric information, e.g. words, letters or serial numbers · CPC title

• H10W74/47

  comprising organic materials, e.g. plastics or resins · CPC title

• H10W74/01

  Manufacture or treatment · CPC title

• H10W46/601

  for use after dicing · CPC title