Alignment mark and semiconductor device, and fabrication methods thereof

Patent metadata

Field	Value
Publication number	US-11049816-B2
Application number	US-201816236568-A
Country	US
Kind code	B2
Filing date	Dec 30, 2018
Priority date	Nov 20, 2018
Publication date	Jun 29, 2021
Grant date	Jun 29, 2021

Abstract

An alignment mark, a semiconductor device, and fabrication methods of the alignment mark and the semiconductor device are provided. The method includes providing a first base substrate, and forming a plurality of alignment marks on the first base substrate. The method also includes dicing the first base substrate to form a plurality of alignment dies. Each alignment die includes a diced first base substrate and at least one alignment mark diced from the plurality of alignment marks on the diced first base substrate. In addition, the method includes providing a second base substrate for aligning, and forming a bonding film on the second base substrate. Further, the method includes attaching an alignment die of the plurality of alignment dies to the bonding film on an alignment region of the second base substrate using a die attach process.

First claim

What is claimed is:

1. A method for forming a semiconductor device, comprising:
providing a first base substrate;
forming a plurality of alignment marks on the first base substrate;
dicing the first base substrate to form a plurality of alignment dies, wherein each alignment die includes a diced first base substrate and at least one alignment mark diced from the plurality of alignment marks on the diced first base substrate;
providing a second base substrate for aligning;
forming a bonding film on the second base substrate;
forming an alignment mark for the second base substrate by attaching an alignment die of the plurality of alignment dies to the bonding film on an alignment region of the second base substrate using a die attach process, and
attaching a chip on a surface of the second base substrate on which the alignment die is attached.

2. A method for forming a semiconductor device, comprising:
providing a first base substrate;
forming a plurality of alignment marks on the first base substrate;
dicing the first base substrate to form a plurality of alignment dies, wherein each alignment die includes a diced first base substrate and at least one alignment mark diced from the plurality of alignment marks on the diced first base substrate;
providing a second base substrate for aligning;
forming a bonding film on the second base substrate;
attaching an alignment die of the plurality of alignment dies to the bonding film on an alignment region of the second base substrate using a die attach process; and
aligning and bonding a third base substrate with a surface of the second base substrate on which the alignment die is attached.

3. The method according to claim 2 , wherein:
the bonding of the third base substrate with the second base substrate is a temporary bonding; and
after separating the second base substrate from the third base substrate, another bonding film is applied on the second base substrate and another alignment die is attached onto the second base substrate to perform additional aligning and bonding of another base substrate with the second base substrate.

4. A method for forming an alignment mark, comprising:
providing a semiconductor material base substrate;
forming a plurality of alignment marks on the semiconductor material base substrate, wherein the plurality of alignment marks are distributed throughout the semiconductor material base substrate;
dicing the semiconductor material base substrate to form a plurality of alignment dies to form a plurality of alignment marks for a carrier wafer, and
attaching a chip on a surface of the second base substrate on which the alignment die is attached.

5. The method according to claim 2 , further including:
attaching a chip on a surface of the second base substrate on which the alignment die is attached.

6. The method according to claim 2 , wherein the die attach process includes:
placing the alignment die on the bonding film in the alignment region of the second base substrate, and
applying a pressure on one or more of the alignment die and the second base substrate.

7. The method according to claim 6 , wherein:
an applied pressure is in a range of approximately 0.1 N-5 N,
a temperature for applying the pressure is in a range of approximately 23° C.-80° C., and
a duration for applying the pressure is in a range of approximately 0.1 second-5 seconds.

8. The method according to claim 2 , wherein:
the first base substrate is a semiconductor material base substrate, and
the bonding film is made of one of a thermoplastic organic material, a thermosetting organic material, an inorganic material, a die attach film, and a dry film, wherein the inorganic material includes copper, nickel, chromium, cobalt, or a combination thereof.

9. The method according to claim 1 , wherein the die attach process includes:
placing the alignment die on the bonding film in the alignment region of the second base substrate, and
applying a pressure on one or more of the alignment die and the second base substrate.

10. The method according to claim 9 , wherein:
an applied pressure is in a range of approximately 0.1 N-5 N,
a temperature for applying the pressure is in a range of approximately 23° C.-80° C., and
a duration for applying the pressure is in a range of approximately 0.1 second-5 seconds.

11. The method according to claim 1 , wherein:
the first base substrate is a semiconductor material base substrate, and
the bonding film is made of one of a thermoplastic organic material, a thermosetting organic material, an inorganic material, a die attach film, and a dry film, wherein the inorganic material includes copper, nickel, chromium, cobalt, or a combination thereof.

12. The method according to claim 1 , wherein forming the plurality of alignment marks on the first base substrate includes:
forming a light-shielding layer on the first base substrate;
forming a first photoresist layer on the light-shielding layer;
patterning the first photoresist layer;
etching the light-shielding layer using the patterned first photoresist layer as a mask to form the plurality of alignment marks; and
removing the patterned first photoresist layer.

13. The method according to claim 12 , further including:
forming a scribe line on the first base substrate, wherein the scribe line and the plurality of alignment marks are formed in a same process; and
while etching the light-shielding layer, simultaneously etching the light-shielding layer corresponding to a region of the scribe line to form a trench in the first base substrate, the trench being the scribe line.

14. The method according to claim 12 , before or after forming the plurality of alignment marks, further including:
forming a second photoresist layer on the first base substrate;
patterning the second photoresist layer to expose the first base substrate corresponding to a region of a scribe line;
etching the first base substrate using the patterned second photoresist layer as a mask to form a trench in the first base substrate, the trench being the scribe line; and
removing the patterned second photoresist layer.

15. The method according to claim 1 , wherein:
at least two alignment regions are arranged on the second base substrate; and
two alignment regions of the at least two alignment regions are arranged on opposite sides of the second base substrate.

16. The method according to claim 1 , wherein:
an attach accuracy of the alignment die is smaller than or equal to about 3 μm.

17. The method according to claim 1 , wherein:
a shape of an alignment mark of the plurality of alignment marks includes one or more of a cross shape, a star shape, a circle shape, an ellipse shape, a rectangle shape, and a square shape.

18. The method according to claim 1 , wherein:
a maximum size of an alignment mark of the plurality of alignment marks is in a range of approximately 0.5 mm*0.5 mm to 10 mm*10 mm.

19. The method according to claim 4 , wherein forming the plurality of alignment marks includes:
forming a light-shielding layer on the first base substrate;
forming a first photoresist layer on the light-shielding layer;
patterning the first photoresist layer;
etching the light-shielding layer using the patterned first photoresist layer as a mask to form the plurality of alignment marks; and
removing the patterned first photoresist layer.

Assignees

• Ningbo Semiconductor Int Corp

Inventors

• Liu Mengbin

Classifications

• H10P72/0614

  Marking devices · CPC title

• H10P54/00

  Cutting or separating of wafers, substrates or parts of devices · CPC title

• H10W46/301

  for alignment · CPC title

• H10W46/201

  located on the periphery of wafers, e.g. orientation notches or lot numbers · CPC title

• H10W46/00 Primary

  Marks applied to devices, e.g. for alignment or identification · CPC title