Fabrication of all-solid-state energy storage devices

Patent metadata

Field	Value
Publication number	US-11031631-B2
Application number	US-201916238319-A
Country	US
Kind code	B2
Filing date	Jan 2, 2019
Priority date	Jan 2, 2019
Publication date	Jun 8, 2021
Grant date	Jun 8, 2021

Abstract

A semiconductor device structure and method for forming the same is disclosed. The structure incudes a silicon substrate having at least one trench disposed therein. An electrical and ionic insulating layer is disposed over at least a top surface of the substrate. A plurality of energy storage device layers is formed within the one trench. The plurality of layers includes at least a cathode-based active electrode having a thickness of, for example, at least 100 nm and an internal resistance of, for example, less than 50 Ohms/cm 2 . The method includes forming at least one trench in a silicon substrate. An electrical and ionic insulating layer(s) is formed and disposed over at least a top surface of the silicon substrate. A plurality of energy storage device layers is formed within the trench. Each layer of the plurality of energy storage device layers is independently processed and integrated into the trench.

First claim

What is claimed is:

1. A method of forming a semiconductor device structure, the method comprising:
forming at least one trench in a silicon substrate, the at least one trench providing an energy storage device containment feature;
forming at least one electrical and ionic insulating layer over at least a top surface of the silicon substrate and within the at least one trench;
removing a portion of the at least one electrical and ionic insulating layer from at least a bottom surface of the at least one trench; and
forming a plurality of energy storage device layers within the at least one trench, wherein each layer of the plurality of energy storage device layers is independently processed and integrated into the at least one trench, where thermal, electrical, and pressure parameters of the independently processed layers are controlled by sidewalls and a base of the at least one trench.

2. The method of claim 1 , wherein forming the plurality of energy storage device layers comprises:
forming a first current collector disposed on a backside of the silicon substrate;
forming an anode layer composed of one or more independently deposited and processed layers where more than one independently deposited and processed layer forms a composite anode material;
forming an anode interfacial layer composed of one or more independently deposited and processed layers where more than one independently deposited and processed layer forms a composite anode interfacial material;
forming an electrolyte layer composed of one or more independently deposited and processed layers where more than one independently deposited and processed layer forms a composite electrolyte material;
forming an electrolyte interfacial layer composed of one or more independently deposited and processed layers where more than one independently deposited and processed layer forms a composite cathode interfacial material;
forming a cathode material layer composed of two or more independently deposited and processed layers where more than one independently deposited and processed layer form a composite cathode material;
forming a second current collector; and
forming an encapsulation layer composed of one or more independently deposited and processed layers.

3. The method of claim 2 , wherein forming the composite anode material comprises one of:
forming more than one independently deposited and processed layer using an anode material and an electrolyte material;
forming more than one independently deposited and processed layer using an anode material, an electrolyte material, and a conductive additive material; or
forming more than one independently deposited and processed layer using an anode material, an electrolyte material, a conductive additive material, and an interfacial impedance reducing material.

4. The method of claim 2 , wherein forming the composite cathode material comprises one of:
forming more than one independently deposited and processed layer using a cathode material and an electrolyte material;
forming more than one independently deposited and processed layer using a cathode material, an electrolyte material, and a conductive additive material; or
forming more than one independently deposited and processed layer using a cathode material, an electrolyte material, a conductive additive material, and an interfacial impedance reducing material.

5. The method of claim 2 , wherein forming the composite electrolyte material comprises one of:
forming more than one independently deposited and processed layer using a cathode material and an electrolyte material;
forming more than one independently deposited and processed layer using an anode material and an electrolyte material;
forming more than one independently deposited and processed layer using a cathode material, an electrolyte material, and a cathode/electrolyte interfacial impedance reducing material; or
forming more than one independently deposited and processed layer using an anode material, an electrolyte material, and an anode/electrolyte interfacial impedance reducing material.

6. The method of claim 2 , wherein at least one of the anode interfacial layer or the electrolyte interfacial layer is formed utilizing one or more materials that increase chemical adhesion of layers above and below of the at least one of the anode interfacial layer interfacial layer or the electrolyte interfacial layer.

7. The method of claim 2 , wherein forming the plurality of energy storage device layers comprises:
forming a porous silicon layer of unitary construction with a p+ type silicon substrate, wherein the porous silicon layer provides at least a portion of a first active electrode for an energy storage device disposed in the energy storage device containment feature.

Assignees

• IBM

Inventors

• Collins John
• Krishnan Mahadevaiyer
• Bedell Stephen
• Pacquette Adele L
• Papalia John
• Todorov Teodor

Classifications

• H01M50/555

  Window-shaped terminals · CPC title

• Y02P70/50

  Manufacturing or production processes characterised by the final manufactured product · CPC title

• H01M10/0562

  Solid materials · CPC title

• H01M4/70

  characterised by shape or form · CPC title

• H01M10/058

  Construction or manufacture · CPC title