Method, Apparatus, and System for Energy Efficiency and Energy Conservation Including Autonomous Hardware-Based Deep Power Down in Devices
US-2016335020-A1 · Nov 17, 2016 · US
US11010953B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11010953-B2 |
| Application number | US-201715493195-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 21, 2017 |
| Priority date | Apr 21, 2017 |
| Publication date | May 18, 2021 |
| Grant date | May 18, 2021 |
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Briefly, in accordance with one or more embodiments, a processor receives an incoming data stream that includes alpha channel data, and a memory stores an application programming interface (API). The API is to route the alpha channel data to a fixed point blending unit to perform one or more blending operations using fixed point representation of the alpha channel data. The API is further to route the incoming data stream to a floating point blending unit to perform operations involving floating point representation of the incoming data.
Opening claim text (preview).
What is claimed is: 1. An apparatus, comprising: a processor to receive an incoming data stream that includes alpha channel data; and a memory to store an application programming interface (API); wherein the API is to route the alpha channel data to a fixed point blending unit to perform one or more blending operations using fixed point representation of the alpha channel data, wherein a first Finite Impulse Response (FIR) filter, coupled to the fixed point blending unit, is to operate at a lower precision and a second FIR filter, coupled to the fixed point blending unit, is to operate at a second precision that corresponds to a difference between a higher precision and the lower precision. 2. The apparatus of claim 1 , wherein the API is further to route the incoming data stream to a floating point blending unit to perform operations involving floating point representation of the incoming data. 3. The apparatus of claim 2 , wherein an output of the fixed point blending unit is combined with an output of the floating point blending unit. 4. The apparatus of claim 2 , wherein the API is further to route the alpha channel data to the fixed point blending unit in a lower power mode, and to route the alpha channel data to the floating point blending unit in a higher power mode. 5. The apparatus of claim 1 , wherein the processor is to comprise one or more of: a Graphics Processing Unit (GPU) or a processor core, or a combination thereof. 6. The apparatus of claim 1 , wherein the fixed point blending unit comprises hardware, software, firmware, or a combination thereof. 7. The apparatus of claim 1 , wherein the one or more blending operations comprises a blending computation performed using the fixed point representation of the alpha channel data in one of an SNORM format or an UNORM format. 8. The apparatus of claim 1 , wherein results of the first FIR filter and the second FIR filter are to be combined to generate a single value that is equivalent to a result that would have been generated by a single FIR filter operated at the higher precision. 9. A method comprising: receiving an incoming data stream that includes alpha channel data; and routing the alpha channel data to a fixed point blending unit to perform one or more blending operations using fixed point representation of the alpha channel data, wherein a first Finite Impulse Response (FIR) filter, coupled to the fixed point blending unit, operates at a lower precision and a second FIR filter, coupled to the fixed point blending unit, operates at a second precision that corresponds to a difference between a higher precision and the lower precision. 10. The method of claim 9 , further comprising routing the incoming data stream to a floating point blending unit to perform operations involving floating point representation of the incoming data. 11. The method of claim 10 , further comprising combining an output of the fixed point blending unit with an output of the floating point blending unit. 12. The method of claim 10 , further comprising routing the alpha channel data to the fixed point blending unit in a lower power mode, and routing the alpha channel data to the floating point blending unit in a higher power mode. 13. The method of claim 9 , wherein the fixed point blending unit comprises hardware, software, firmware, or a combination thereof. 14. One or more non-transitory computer-readable media comprising one or more instructions that, if executed on at least one processor, configure the at least one processor to perform one or more operations to: receive an incoming data stream that includes alpha channel data; and route the alpha channel data to a fixed point blending unit to perform one or more blending operations using fixed point representation of the alpha channel data, wherein a first Finite Impulse Response (FIR) filter, coupled to the fixed point blending unit, is to operate at a lower precision and a second FIR filter, coupled to the fixed point blending unit, is to operate at a second precision that corresponds to a difference between a higher precision and the lower precision. 15. The one or more non-transitory computer-readable media of claim 14 , wherein the instructions, if executed, further configure the at least one processor to perform one or more operations to route the incoming data stream to a floating point blending unit to perform operations involving floating point representation of the incoming data. 16. The one or more non-transitory computer-readable media of claim 15 , wherein the instructions, if executed, further configure the at least one processor to perform one or more operations to combine an output of the fixed point blending unit with an output of the floating point blending unit. 17. The one or more non-transitory computer-readable media of claim 15 , further configure the at least one processor to perform one or more operations to route the alpha channel data to the fixed point blending unit in a lower power mode, and route the alpha channel data to the floating point blending unit in a higher power mode. 18. The method of claim 14 , wherein the fixed point blending unit comprises hardware, software, firmware, or a combination thereof. 19. An apparatus comprising: means for receiving an incoming data stream that includes alpha channel data; and means for routing the alpha channel data to a fixed point blending unit to perform one or more blending operations using fixed point representation of the alpha channel data, wherein a first Finite Impulse Response (FIR) filter, coupled to the fixed point blending unit, is to operate at a lower precision and a second FIR filter, coupled to the fixed point blending unit, is to operate at a second precision that corresponds to a difference between a higher precision and the lower precision. 20. The apparatus of claim 19 , further comprising means for routing the incoming data stream to a floating point blending unit to perform operations involving floating point representation of the incoming data. 21. The apparatus of claim 20 , further comprising means for combining an output of the fixed point blending unit with an output of the floating point blending unit. 22. The apparatus of claim 20 , further comprising means for routing the alpha channel data to the fixed point blending unit in a lower power mode, and routing the alpha channel data to the floating point blending unit in a higher power mode. 23. The apparatus of claim 19 , wherein the fixed point blending unit comprises hardware, software, firmware, or a combination thereof.
Measures to reduce power consumption · CPC title
Non-recursive filters · CPC title
Processor architectures; Processor configuration, e.g. pipelining · CPC title
General purpose rendering architectures · CPC title
Blending, e.g. for anti-aliasing · CPC title
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