Dedicated fixed point blending for energy efficiency

US11010953B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11010953-B2
Application numberUS-201715493195-A
CountryUS
Kind codeB2
Filing dateApr 21, 2017
Priority dateApr 21, 2017
Publication dateMay 18, 2021
Grant dateMay 18, 2021

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Briefly, in accordance with one or more embodiments, a processor receives an incoming data stream that includes alpha channel data, and a memory stores an application programming interface (API). The API is to route the alpha channel data to a fixed point blending unit to perform one or more blending operations using fixed point representation of the alpha channel data. The API is further to route the incoming data stream to a floating point blending unit to perform operations involving floating point representation of the incoming data.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus, comprising: a processor to receive an incoming data stream that includes alpha channel data; and a memory to store an application programming interface (API); wherein the API is to route the alpha channel data to a fixed point blending unit to perform one or more blending operations using fixed point representation of the alpha channel data, wherein a first Finite Impulse Response (FIR) filter, coupled to the fixed point blending unit, is to operate at a lower precision and a second FIR filter, coupled to the fixed point blending unit, is to operate at a second precision that corresponds to a difference between a higher precision and the lower precision. 2. The apparatus of claim 1 , wherein the API is further to route the incoming data stream to a floating point blending unit to perform operations involving floating point representation of the incoming data. 3. The apparatus of claim 2 , wherein an output of the fixed point blending unit is combined with an output of the floating point blending unit. 4. The apparatus of claim 2 , wherein the API is further to route the alpha channel data to the fixed point blending unit in a lower power mode, and to route the alpha channel data to the floating point blending unit in a higher power mode. 5. The apparatus of claim 1 , wherein the processor is to comprise one or more of: a Graphics Processing Unit (GPU) or a processor core, or a combination thereof. 6. The apparatus of claim 1 , wherein the fixed point blending unit comprises hardware, software, firmware, or a combination thereof. 7. The apparatus of claim 1 , wherein the one or more blending operations comprises a blending computation performed using the fixed point representation of the alpha channel data in one of an SNORM format or an UNORM format. 8. The apparatus of claim 1 , wherein results of the first FIR filter and the second FIR filter are to be combined to generate a single value that is equivalent to a result that would have been generated by a single FIR filter operated at the higher precision. 9. A method comprising: receiving an incoming data stream that includes alpha channel data; and routing the alpha channel data to a fixed point blending unit to perform one or more blending operations using fixed point representation of the alpha channel data, wherein a first Finite Impulse Response (FIR) filter, coupled to the fixed point blending unit, operates at a lower precision and a second FIR filter, coupled to the fixed point blending unit, operates at a second precision that corresponds to a difference between a higher precision and the lower precision. 10. The method of claim 9 , further comprising routing the incoming data stream to a floating point blending unit to perform operations involving floating point representation of the incoming data. 11. The method of claim 10 , further comprising combining an output of the fixed point blending unit with an output of the floating point blending unit. 12. The method of claim 10 , further comprising routing the alpha channel data to the fixed point blending unit in a lower power mode, and routing the alpha channel data to the floating point blending unit in a higher power mode. 13. The method of claim 9 , wherein the fixed point blending unit comprises hardware, software, firmware, or a combination thereof. 14. One or more non-transitory computer-readable media comprising one or more instructions that, if executed on at least one processor, configure the at least one processor to perform one or more operations to: receive an incoming data stream that includes alpha channel data; and route the alpha channel data to a fixed point blending unit to perform one or more blending operations using fixed point representation of the alpha channel data, wherein a first Finite Impulse Response (FIR) filter, coupled to the fixed point blending unit, is to operate at a lower precision and a second FIR filter, coupled to the fixed point blending unit, is to operate at a second precision that corresponds to a difference between a higher precision and the lower precision. 15. The one or more non-transitory computer-readable media of claim 14 , wherein the instructions, if executed, further configure the at least one processor to perform one or more operations to route the incoming data stream to a floating point blending unit to perform operations involving floating point representation of the incoming data. 16. The one or more non-transitory computer-readable media of claim 15 , wherein the instructions, if executed, further configure the at least one processor to perform one or more operations to combine an output of the fixed point blending unit with an output of the floating point blending unit. 17. The one or more non-transitory computer-readable media of claim 15 , further configure the at least one processor to perform one or more operations to route the alpha channel data to the fixed point blending unit in a lower power mode, and route the alpha channel data to the floating point blending unit in a higher power mode. 18. The method of claim 14 , wherein the fixed point blending unit comprises hardware, software, firmware, or a combination thereof. 19. An apparatus comprising: means for receiving an incoming data stream that includes alpha channel data; and means for routing the alpha channel data to a fixed point blending unit to perform one or more blending operations using fixed point representation of the alpha channel data, wherein a first Finite Impulse Response (FIR) filter, coupled to the fixed point blending unit, is to operate at a lower precision and a second FIR filter, coupled to the fixed point blending unit, is to operate at a second precision that corresponds to a difference between a higher precision and the lower precision. 20. The apparatus of claim 19 , further comprising means for routing the incoming data stream to a floating point blending unit to perform operations involving floating point representation of the incoming data. 21. The apparatus of claim 20 , further comprising means for combining an output of the fixed point blending unit with an output of the floating point blending unit. 22. The apparatus of claim 20 , further comprising means for routing the alpha channel data to the fixed point blending unit in a lower power mode, and routing the alpha channel data to the floating point blending unit in a higher power mode. 23. The apparatus of claim 19 , wherein the fixed point blending unit comprises hardware, software, firmware, or a combination thereof.

Assignees

Inventors

Classifications

  • Measures to reduce power consumption · CPC title

  • Non-recursive filters · CPC title

  • G06T1/20Primary

    Processor architectures; Processor configuration, e.g. pipelining · CPC title

  • G06T15/005Primary

    General purpose rendering architectures · CPC title

  • Blending, e.g. for anti-aliasing · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US11010953B2 cover?
Briefly, in accordance with one or more embodiments, a processor receives an incoming data stream that includes alpha channel data, and a memory stores an application programming interface (API). The API is to route the alpha channel data to a fixed point blending unit to perform one or more blending operations using fixed point representation of the alpha channel data. The API is further to ro…
Who is the assignee on this patent?
Appu Abhishek R, Surti Prasoonkumar, Mysore Srivallaba, and 7 more
What technology area does this patent fall under?
Primary CPC classification G06T1/20. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue May 18 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).