Methods of etching conductive features, and related devices and systems

US11006528B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11006528-B2
Application numberUS-201916507358-A
CountryUS
Kind codeB2
Filing dateJul 10, 2019
Priority dateDec 12, 2016
Publication dateMay 11, 2021
Grant dateMay 11, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method of making a device patterned with one or more electrically conductive features includes depositing a conductive material layer over an electrically insulating surface of a substrate, depositing an anti-corrosive material layer over the conductive material layer, and depositing an etch-resist material layer over the anti-corrosive material layer. The etch-resist material layer may be deposited over the anti-corrosive material layer, and the anti-corrosive material layer forming a bi-component etch mask in a pattern resulting in covered portions of the conductive material layer and exposed portions of the conductive material layer, the covered portions being positioned at locations corresponding to one or more conductive features of the device. A wet-etch process is performed to remove the exposed portions of the conductive material layer from the electrically insulating substrate, and the bi-component etch mask is removed to expose the remaining conductive material. Systems and devices relate to devices with patterned features.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of making a device patterned with one or more electrically conductive features, the method comprising: depositing a conductive material layer over an electrically insulating surface of a substrate; depositing a primer layer in a pattern over the conductive material layer; depositing an etch-resist material layer over the primer layer; reacting the primer layer and the etch-resist material layer to form a bi-component etch mask in the pattern resulting in covered portions of the conductive material layer and exposed portions of the conductive material layer; performing a wet-etch process to remove the exposed portions of the conductive material layer from the electrically insulating surface; protecting a portion of the conductive material layer from being removed during the wet-etch process, the portion being located at a sidewall of the conductive material layer under the bi-component etch mask; and removing the bi-component etch mask to expose conductive material remaining from the covered portions of the conductive material layer, thereby forming the one or more electrically conductive features of the device. 2. The method of claim 1 , wherein depositing the primer layer over the conductive material layer comprises depositing a polymer over the conductive material layer. 3. The method of claim 1 , wherein depositing the primer layer over the conductive material layer comprises depositing an organic material over the conductive material layer. 4. The method of claim 3 , wherein the organic material is chosen from a material comprising one or more -imine groups, a material comprising one or more -amine groups, a material comprising one or more -azole groups, and a material comprising one or more hydrazine groups. 5. The method of claim 3 , wherein the organic material comprises an amino acid. 6. The method of claim 1 , further comprising irradiating portions of the etch-resist material layer with light, the irradiated portions corresponding locations of the one or more electrically conductive features. 7. The method of claim 6 , wherein irradiating portions of the etch-resist material with light comprises using at least one of laser direct writing or photomask exposure. 8. The method of claim 1 , wherein depositing the etch-resist material layer comprises depositing the etch-resist material layer using at least one of inkjet printing, slot die coating, spin coating, or lamination. 9. The method of claim 1 , wherein depositing the primer layer comprises depositing the primer layer using at least one of inkjet printing, slot die coating, spin coating, or lamination. 10. The method of claim 1 , wherein the etch-resist material layer is deposited so as to have a thickness of less than or equal to 15 μm. 11. The method of claim 1 , wherein the etch-resist material layer is deposited so as to have a thickness of less than or equal to 5 μm. 12. The method of claim 1 , wherein, in a dried state, a thickness of the primer layer ranges from 0.01 μm to 5 μm. 13. The method of claim 1 , wherein the conductive material layer comprises a metal. 14. The method of claim 1 , wherein the conductive material layer comprises copper. 15. A method of making a device patterned with one or more electrically conductive features, the method comprising: depositing a conductive material layer over an electrically insulating surface of a substrate; depositing a primer layer in a pattern over the conductive material layer; depositing an etch-resist material layer over the primer layer, the etch-resist material layer and the primer layer forming a bi-component etch mask in the pattern resulting in covered portions of the conductive material layer and exposed portions of the conductive material layer; performing a wet-etch process to remove the exposed portions of the conductive material layer from the electrically insulating surface; protecting a portion of the conductive material layer from being removed during the wet-etch process, the portion being located at a sidewall of the conductive material layer under the bi-component etch mask; and removing the bi-component etch mask to expose conductive material remaining from the covered portions of the conductive material layer, thereby forming the one or more electrically conductive features of the device, wherein protecting the portion of the conductive material layer from being removed comprises dissociating material exhibiting an anti-corrosive property from the bi-component etch mask and adsorbing the dissociated material to the portion of the conductive material layer at the sidewall under the bi-component etch mask. 16. A method of making a device patterned with one or more electrically conductive features, the method comprising: depositing a conductive material layer over an electrically insulating surface of a substrate; depositing an organic primer layer in a pattern over the conductive material layer; depositing an etch-resist material layer over the primer layer, the etch-resist material layer and the primer layer forming a bi-component etch mask in the pattern resulting in covered portions of the conductive material layer and exposed portions of the conductive material layer; performing a wet-etch process to remove the exposed portions of the conductive material layer from the electrically insulating surface; protecting a portion of the conductive material layer from being removed during the wet-etch process, the portion being located at a sidewall of the conductive material layer under the bi-component etch mask; and removing the bi-component etch mask to expose conductive material remaining from the covered portions of the conductive material layer, thereby forming the one or more electrically conductive features of the device, wherein the organic material comprises a Schiff Base. 17. A method of making a device comprising one or more electrically conductive features, the method comprising: depositing an organic material primer layer over a conductive material layer on an electrically insulating surface of a substrate, the organic material primer layer being chosen from a material comprising one or more -azole groups and a material comprising a Schiff Base, depositing an etch-resist material layer over the primer layer, the etch-resist material layer and the primer layer forming a bi-component etch mask resulting in covered portions of the conductive material layer and exposed portions of the conductive material layer; performing a wet-etch process to remove the exposed portions of the conductive material layer from the electrically insulating substrate; and removing the bi-component etch mask to expose conductive material remaining from the covered portions of the conductive material layer, thereby forming the one or more electrically conductive features of the device. 18. The method of claim 17 , further comprising protecting a portion of the conductive material layer from being removed during the wet-etch process, the portion being located at a sidewall of the conductive material layer under the bi-component etch mask. 19. The method of claim 17 , further comprising irradiating portions of the etch-resist material layer with light, the irradiated portions corresponding to the one or more electrically conductive features. 20. The method of claim 17 , wherein depositing the etch-resist material layer comprises depositing the etch-resist material layer using at least one of inkjet printing, slot die coating, spin coating, or laminatio

Assignees

Inventors

Classifications

  • Underetching, e.g. etching of substrate under conductors or etching of conductor under dielectrics; Means for allowing or controlling underetching · CPC title

  • Chemical reaction, e.g. heating solder by exothermic reaction · CPC title

  • Pretreatment of metal, e.g. before finish plating, etching · CPC title

  • for inhibiting the corrosion of the circuit, e.g. for preserving the solderability · CPC title

  • Apparatus for etching printed circuits · CPC title

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What does patent US11006528B2 cover?
A method of making a device patterned with one or more electrically conductive features includes depositing a conductive material layer over an electrically insulating surface of a substrate, depositing an anti-corrosive material layer over the conductive material layer, and depositing an etch-resist material layer over the anti-corrosive material layer. The etch-resist material layer may be de…
Who is the assignee on this patent?
Kateeva Inc
What technology area does this patent fall under?
Primary CPC classification H05K3/061. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 11 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).