Three-dimensional decoupling integration within hole in motherboard

Patent metadata

Field	Value
Publication number	US-11006514-B2
Application number	US-201716481043-A
Country	US
Kind code	B2
Filing date	Mar 30, 2017
Priority date	Mar 30, 2017
Publication date	May 11, 2021
Grant date	May 11, 2021

Abstract

Semiconductor packages and a method of forming a semiconductor package are described. The semiconductor package has a foundation layer mounted on a motherboard. The semiconductor package also includes a hole in motherboard (HiMB) that is formed in the motherboard. The semiconductor package has one or more capacitors mounted on an electrical shield. The electrical shield may be embedded in the HiMB of the motherboard. Accordingly, the semiconductor package has capacitors vertically embedded between the electrical shield and the HiMB of the motherboard. The semiconductor package may also have one or more HiMB sidewalls formed on the HiMB, where each of the one or more HiMB sidewalls includes at least one or more plated through holes (PTHs) with an exposed layer. The PTHs may be electrically coupled to the capacitors as the capacitors are vertically embedded between the electrical shield sidewalls and the HiMB sidewalls (i.e., three-dimensional (3D) capacitors).

First claim

What is claimed is:

1. A semiconductor package, comprising:
a foundation layer mounted on a motherboard;
a hole in motherboard (HiMB) formed in the motherboard; and
one or more capacitors mounted on an electrical shield, the electrical shield embedded in the HiMB of the motherboard, wherein the one or more capacitors are vertically embedded between the electrical shield and the HiMB of the motherboard.

2. The semiconductor package of claim 1 , further comprising:
an adhesive mounted between the electrical shield and the one or more capacitors; and
one or more ground pads mounted on the motherboard.

3. The semiconductor package of claim 2 , wherein the electrical shield includes at least one or more metal pads and one or more electrical shield sidewalls, and wherein the one or more metal pads of the electrical shield are coupled with the one or more ground pads of the motherboard.

4. The semiconductor package of claim 3 , wherein each electrical shield sidewall is attached and perpendicular to at least one of the one or more metal pads.

5. The semiconductor package of claim 1 , further comprising:
a land-side cavity formed on the foundation layer, wherein the land-side cavity resides underneath the foundation layer; and
one or more land-side capacitors (LSCs) mounted on the land-side cavity of the foundation layer, wherein the one or more LSCs are mounted above the HiMB of the motherboard and the electrical shield.

6. The semiconductor package of claim 5 , wherein the HiMB of the motherboard resides below the land-side cavity and the LSCs of the foundation layer.

7. The semiconductor package of claim 1 , further comprising one or more HiMB sidewalls formed on the HiMB of the motherboard, wherein each of the one or more HiMB sidewalls includes at least one or more plated through holes (PTHs), and wherein each of the one or more PTHs includes an exposed layer.

8. The semiconductor package of claim 7 , wherein the one or more PTHs are electrically coupled to the one or more capacitors when the one or more capacitors are vertically embedded between sidewalls of the electrical shield and the HiMB sidewalls.

9. The semiconductor package of claim 1 , further comprising a semiconductor die mounted above the foundation layer and the HiMB of the motherboard, and wherein the foundation layer is attached to the motherboard with a plurality of solder balls.

10. The semiconductor package of claim 1 , further comprising at least one of a spring mechanism, an assembly handler, and a molding jig.

11. A method of forming a semiconductor package, comprising:
mounting one or more capacitors on an electrical shield;
molding one or more electrical shield sidewalls on the electrical shield, wherein each electrical shield sidewall includes at least one or more metal pads;
removing the electrical shield, wherein each electrical shield sidewall is molded perpendicular to the metal pad; and
embedding the one or more electrical shield sidewalls of the electrical shield in a HiMB formed in a motherboard, wherein the one or more capacitors are vertically mounted between the one or more electrical shield sidewalls of the electrical shield and the HiMB of the motherboard.

12. The method of claim 11 , further comprising forming the electrical shield to have at least one or more folding edges prior to mounting the one or more capacitors.

13. The method of claim 12 , wherein molding the one or more electrical shield sidewalls further comprises mounting the electrical shield above a molding jig, and applying pressure at least on the one or more folding edges of the electrical shield to mold the one or more electric shield sidewalls using the molding jig.

14. The method of claim 11 , further comprising:
mounting an adhesive between the electrical shield and the one or more capacitors;
mounting a foundation layer on the motherboard; and
mounting one or more ground pads on the motherboard.

15. The method of claim 14 , wherein the one or more metal pads of the electrical shield are coupled with the one or more ground pads of the motherboard.

16. The method of claim 14 , further comprising:
forming a land-side cavity on the foundation layer, wherein the land-side cavity resides underneath the foundation layer; and
mounting one or more land-side capacitors (LSCs) on the land-side cavity of the foundation layer, wherein the one or more LSCs are mounted above the HiMB of the motherboard and the electrical shield.

17. The method of claim 16 , wherein the HiMB of the motherboard resides below the land-side cavity and the LSCs of the foundation layer.

18. The method of claim 14 , further comprising mounting a semiconductor die above the foundation layer and the HiMB of the motherboard; and
mounting the foundation layer to the motherboard with a plurality of solder balls.

19. The method of claim 11 , further comprising forming one or more HiMB sidewalls on the HiMB of the motherboard, wherein each of the one or more HiMB sidewalls includes at least one or more plated through holes (PTHs), and wherein each of the one or more PTHs includes an exposed layer.

20. The method of claim 19 , wherein the one or more PTHs are electrically coupled to the one or more capacitors when the one or more capacitors are vertically embedded between the electrical shield sidewalls and the HiMB sidewalls.

21. The method of claim 11 , further comprising at least one of a spring mechanism, and an assembly handler.

22. A semiconductor package, comprising:
a foundation layer mounted on a motherboard;
a hole in motherboard (HiMB) formed in the motherboard;
one or more capacitors in the HiMB; and
an electrical shield in the HiMB.

23. The semiconductor package of claim 22 , further comprising:
wherein the one or more capacitors are vertically embedded between the electrical shield and the HiMB of the motherboard;
an adhesive mounted between the electrical shield and the one or more capacitors;

one or more ground pads mounted on the motherboard;
a semiconductor die mounted above the foundation layer and the HiMB of the motherboard, wherein the foundation layer is attached to the motherboard with a plurality of solder balls; and
one or more HiMB sidewalls formed on the HiMB of the motherboard, each of the one or more HiMB sidewalls includes at least one or more plated through holes (PTHs), wherein each of the one or more PTHs includes an exposed layer.

24. The semiconductor package of claim 23 , wherein the electrical shield includes at least one or more metal pads and one or more electrical shield sidewalls, wherein the one or more metal pads of the electrical shield are coupled with the one or more ground pads of the motherboard, wherein each electrical shield sidewall is attached and perpendicular to at least one of the one or more metal pads, and wherein each of the one or more PTHs is electrically coupled to the one or more capacitors when the one or more capacitors are vertically embedded between the electrical shield sidewalls and the HiMB sidewalls.

25. The semiconductor package of claim 22 , further comprising:
a land-side cavity formed on the foundation layer, wherein the land-side cavity resides underneath the foundation layer; and
one or more land-side capacitors (LSCs) mounted on the land-side cavity of the foundation layer, the one or more LSCs are mounted above the HiMB of the motherboard and the electrical shield, wherein the HiMB of t

Assignees

• Intel Corp

Inventors

• Go Jia Yan
• Lim Min Suet
• Chuah Tin Poay
• Lim Seok Ling
• Loo Howe Yin

Classifications

• H10W95/00

  Packaging processes not covered by the other groups of this subclass · CPC title

• H10W90/701

  characterised by the relative positions of pads or connectors relative to package parts · CPC title

• H10W90/00

  Package configurations · CPC title

• H10W44/601

  Capacitive arrangements (H10W44/20 takes precedence) · CPC title

• H10W42/20 Primary

  protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons · CPC title