Methods and network device for uncoded bit protection in 10Gbase-T ethernet

Patent metadata

Field	Value
Publication number	US-11005498-B1
Application number	US-201916518460-A
Country	US
Kind code	B1
Filing date	Jul 22, 2019
Priority date	May 1, 2014
Publication date	May 11, 2021
Grant date	May 11, 2021

Abstract

A network interface devices receives a plurality of bits, and encodes the plurality of bits into a plurality of bit blocks that includes a first set of bit blocks and a second set of bit blocks. The network interface device transcodes the first set of bit blocks to generate a third set of bit blocks, and aggregates the second set of bit blocks and the third set of bit blocks into an aggregated set of bit blocks. A first error correction encoder encodes a first portion of the bits in the aggregated set of bit blocks to generate a first set of encoded bits. A second error correction encoder encodes a second portion of the bits in the aggregated set of bit blocks to generate a second set of encoded bits. The network interface modulates the first set of encoded bits and the second set of encoded bits.

First claim

What is claimed is:

1. A method for generating a fixed-length frame in a network interface device, the method comprising:
receiving, at a network interface device, a plurality of bits for transmission in the fixed-length frame;
grouping and encoding, at the network interface device, the plurality of bits into a plurality of bit blocks such that a number of bits within the fixed-length frame are available for use as parity bits in the fixed-length frame, wherein the plurality of bit blocks comprises a first set of bit blocks and a second set of bit blocks;
generating, at the network interface device, an aggregated bit block at least by aggregating the first set of bit blocks and the second set of bit blocks;
encoding, at the network interface device, a portion of the bits in the aggregated bit block using a first encoder to generate a first set of encoded bits that includes a set of first parity bits for protecting bits in the first set of encoded bits, the set of first parity bits generated according to a first error correction encoding scheme;
encoding, at the network interface device, a remaining portion of the bits in the aggregated bit block using a second encoder to generate a second set of encoded bits that includes a set of second parity bits for protecting bits in the second set of encoded bits, the second set of parity bits generated according to a second error correction encoding scheme, wherein i) a number of parity bits in the set of second parity bits is less than a number of parity bits in the set of first parity bits and ii) a sum of the number of parity bits in the first set of parity bits and the number of parity bits in the second set of parity bits do not exceed the number of bits in the fixed-length frame made available for use as parity bits in the fixed-length frame;
selecting, at the network interface, constellation points for modulating the first set of encoded bits and the second set of encoded bits, including
selecting, based on bits in the second set of encoded bits, one or more clusters of adjacent constellation points from among a plurality of clusters of adjacent constellation points, and
selecting, based on bits in the first set of encoded bits, constellation points within the clusters of adjacent constellation points such that, when transmitted via the communication link, different respective constellation points in different clusters correspond to different values of each bit in the second set of encoded bits, and different respective constellation points within a respective cluster correspond to different values of each bit in the first set of encoded bits; and

modulating, at the network interface device according to the selected constellation points, the first set of encoded bits and the second set of encoded bits in the aggregated bit block to generate the fixed-length frame that fits the first set of encoded bits and the second set of encoded bits.

2. The method of claim 1 , wherein:
grouping and encoding the plurality of bits into the plurality of bit blocks comprises generating a set of transcoded bit blocks by transcoding the first set of bit blocks, wherein the set of transcoded bit blocks contains fewer bits than the first set of bit blocks;
wherein generating the aggregated bit block comprises aggregating the set of transcoded bit blocks and the second set of bit blocks.

3. The method of claim 2 , wherein the first set of bit blocks comprises a plurality of subsets of bit blocks, and transcoding the first set of bit blocks comprises transcoding each subset of bit blocks into a transcoded bit block.

4. The method of claim 3 , wherein
a subset of bit blocks comprises a plurality of payload bits and a plurality of header bits, and
a transcoded bit block of the subset of bit blocks comprises the plurality of payload bits and one header bit.

5. The method of claim 4 , wherein the one header bit of the transcoded bit block is an indicator of whether the plurality of payload bits in the transcoded bit block are data bits or control bits.

6. The method of claim 1 , wherein
the first encoder is a low-density parity-check code (LDPC) encoder and the first parity bits are LDPC parity bits; and
the second encoder is a Reed-Solomon (RS) encoder and the second parity bits are RS parity bits.

7. The method of claim 1 , further comprising scrambling, at the network interface, the bits in the aggregated bit block before the bits in the aggregated bit block are encoded using the first encoder and the second encoder.

8. The method of claim 1 , further comprising adding, at the network interface, at least one padding bit to the aggregated bit block before the bits in the aggregated bit block are encoded using the first encoder and the second encoder.

9. The method of claim 8 , further comprising adding, at the network interface, cyclic redundancy check bits to the aggregated bit block before the bits in the aggregated bit block are encoded using the first encoder and the second encoder.

10. The method of claim 1 , wherein modulating the encoded bits in the aggregated bit block comprises mapping, at the network interface, the encoded bits into a plurality of modulation symbols selected from a double squared 128 (DSQ128) constellation.

11. A network interface device, comprising:
a physical layer (PHY) processing device comprising: an encoder, a first error correction encoder that operates according to a first error correction encoding scheme, a second error correction encoder that operates according to a second error correction encoding scheme, and a modulator;
wherein the PHY processing device is configured to:
receive a plurality of bits for transmission in a fixed-length frame,
group and encode, using the encoder, the plurality of bits into a plurality of bit blocks such that a number of bits within the fixed-length frame are available for use as parity bits in the fixed-length frame, wherein the plurality of bit blocks comprises a first set of bit blocks and a second set of bit blocks,
generate an aggregated bit block at least by aggregating the first set of bit blocks and the second set of bit blocks,
use the first error correction encoder to encode a portion of the bits in the aggregated bit block to generate a first set of encoded bits that includes a set of first parity bits for protecting bits in the first set of encoded bits,
use the second error correction encoder to encode a remaining portion of the bits in the aggregated bit block to generate a second set of encoded bits that includes a set of second parity bits for protecting bits in the second set of encoded bits, wherein a number of parity bits in the set of second parity bits is less than a number of parity bits in the set of first parity bits, and wherein a sum of the number of parity bits in the first set of parity bits and the number of parity bits in the second set of parity bits do not exceed the number of bits in the fixed-length frame made available for use as parity bits in the fixed-length frame,
select constellation points for modulating the first set of encoded bits and the second set of encoded bits, including
selecting, based on bits in the second set of encoded bits, one or more clusters of adjacent constellation points from among a plurality of clusters of adjacent constellation points, and
selecting, based on bits in the first set of encoded bits, constellation points within the clusters of adjacent constellation points such that, when transmitted via the communication link, different respective constellation points in different clusters correspond to different values of each bit in the second set of encoded bits, and different respective constellation points within a respect

Assignees

• Marvell Int Ltd
• Marvell Asia Pte Ltd

Inventors

• Lo William

Classifications

• H04W84/12

  WLAN [Wireless Local Area Networks] · CPC title

• H04L69/22

  Parsing or analysis of headers · CPC title

• H04L27/2613

  Structure of the reference signals · CPC title

• H04L27/2605

  Symbol extensions, e.g. Zero Tail, Unique Word [UW] · CPC title

• H04L27/2602

  Signal structure · CPC title