Microelectronic devices having air gap structures integrated with interconnect for reduced parasitic capacitances

US10998260B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10998260-B2
Application numberUS-201616462889-A
CountryUS
Kind codeB2
Filing dateDec 30, 2016
Priority dateDec 30, 2016
Publication dateMay 4, 2021
Grant dateMay 4, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Embodiments of the invention include a microelectronic device that includes a substrate, at least one dielectric layer on the substrate and a plurality of conductive lines within the at least one dielectric layer. The microelectronic device also includes an air gap structure that is located below two or more of the plurality of conductive lines.

First claim

Opening claim text (preview).

The invention claimed is: 1. A microelectronic device comprising: a substrate; at least one dielectric layer on the substrate; a plurality of conductive lines within the at least one dielectric layer; and an air gap structure located below two or more of the plurality of conductive lines, the air gap structure comprising a continuous air gap vertically beneath the two or more of the plurality of conductive lines. 2. The microelectronic device of claim 1 , wherein the air gap structure comprises a group III Nitride layer formed on an upper region and sidewalls of the air gap structure. 3. The microelectronic device of claim 2 , further comprising: a metallization stack that includes first and second metal layers with the plurality of conductive lines being at the first metal layer of the metallization stack, wherein the first metal layer being closest to the substrate among the first and second metal layers of the metallization stack. 4. The microelectronic device of claim 2 , wherein the group III Nitride layer comprises an Aluminum Nitride layer, a Boron Nitride layer, a Gallium Nitride layer, an Indium Nitride layer, or any combination of these group III Nitride layers. 5. The microelectronic device of claim 2 , wherein the group III Nitride layer has a thickness of 50 to 250 nanometers. 6. The microelectronic device of claim 1 , wherein the substrate comprises a Silicon substrate. 7. The microelectronic device of claim 1 wherein the air gap structure comprises an air gap having a dielectric constant of approximately 1.0. 8. The microelectronic device of claim 1 , wherein the air gap structure has a substantially rectangular shape or a substantially trapezoidal shape.

Assignees

Inventors

Classifications

  • of dielectric parts comprising air gaps · CPC title

  • comprising two or more dielectric layers having different properties, e.g. different dielectric constants · CPC title

  • comprising air gaps · CPC title

  • H10W10/021Primary

    of air gaps · CPC title

  • Air gaps · CPC title

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Frequently asked questions

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What does patent US10998260B2 cover?
Embodiments of the invention include a microelectronic device that includes a substrate, at least one dielectric layer on the substrate and a plurality of conductive lines within the at least one dielectric layer. The microelectronic device also includes an air gap structure that is located below two or more of the plurality of conductive lines.
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification H10W10/021. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 04 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).