Bonded body and insulating circuit substrate

Patent metadata

Field	Value
Publication number	US-10998250-B2
Application number	US-201816756275-A
Country	US
Kind code	B2
Filing date	Nov 1, 2018
Priority date	Nov 2, 2017
Publication date	May 4, 2021
Grant date	May 4, 2021

Abstract

A bonded body is formed to configured to join a ceramic member formed of a Si-based ceramic and a copper member formed of copper or a copper alloy, in which, in a joint layer formed between the ceramic member and the copper member, a crystalline active metal compound layer formed of a compound including an active metal is formed on the ceramic member side.

First claim

What is claimed is:

1. A bonded body formed to configure to join a ceramic member formed of a Si-based ceramic and a copper member formed of copper or a copper alloy,
wherein, a joint layer is formed between the ceramic member and the copper member,
the joint layer includes a crystalline active metal compound layer and an alloy layer,
the crystalline active metal compound layer, formed of a compound including an active metal, is formed on a ceramic member side,
the alloy layer is formed between the active metal compound layer and the copper member, and
the alloy layer containing, an alloy or an intermetallic compound including Cu—P based brazing material, is formed on a copper member side.

2. The bonded body according to claim 1 ,
wherein a thickness of the active metal compound layer is in a range of 1.5 nm or more and 150 nm or less.

3. The bonded body according to claim 2 ,
wherein the active metal compound layer contains one of an active metal nitride and an active metal oxide.

4. An insulating circuit substrate comprising:
the bonded body according to claim 3 ,
a ceramic substrate formed of the ceramic member; and
a circuit layer formed of the copper member formed on one surface of the ceramic substrate.

5. The insulating circuit substrate according to claim 4 ,
wherein a metal layer is formed on a surface of the ceramic substrate on an opposite side to the circuit layer.

6. The insulating circuit substrate according to claim 5 ,
wherein the metal layer is formed of copper or a copper alloy.

7. The insulating circuit substrate according to claim 5 ,
wherein the metal layer is formed of aluminum or an aluminum alloy.

8. An insulating circuit substrate comprising:
the bonded body according to claim 2 ,
a ceramic substrate formed of the ceramic member; and
a circuit layer formed of the copper member formed on one surface of the ceramic substrate.

9. The insulating circuit substrate according to claim 8 ,
wherein a metal layer is formed on a surface of the ceramic substrate on an opposite side to the circuit layer.

10. The insulating circuit substrate according to claim 9 ,
wherein the metal layer is formed of copper or a copper alloy.

11. The insulating circuit substrate according to claim 9 ,
wherein the metal layer is formed of aluminum or an aluminum alloy.

12. The bonded body according to claim 1 ,
wherein the active metal compound layer contains one of an active metal nitride and an active metal oxide.

13. An insulating circuit substrate comprising:
the bonded body according to claim 12 ,
a ceramic substrate formed of the ceramic member; and
a circuit layer formed of the copper member formed on one surface of the ceramic substrate.

14. The insulating circuit substrate according to claim 13 ,
wherein a metal layer is formed on a surface of the ceramic substrate on an opposite side to the circuit layer.

15. The insulating circuit substrate according to claim 14 ,
wherein the metal layer is formed of copper or a copper alloy.

16. The insulating circuit substrate according to claim 14 ,
wherein the metal layer is formed of aluminum or an aluminum alloy.

17. An insulating circuit substrate comprising:
the bonded body according to claim 1 ,
a ceramic substrate formed of the ceramic member; and
a circuit layer formed of the copper member formed on one surface of the ceramic substrate.

18. The insulating circuit substrate according to claim 17 ,
wherein a metal layer is formed on a surface of the ceramic substrate on an opposite side to the circuit layer.

19. The insulating circuit substrate according to claim 18 ,
wherein the metal layer is formed of copper or a copper alloy.

20. The insulating circuit substrate according to claim 18 ,
wherein the metal layer is formed of aluminum or an aluminum alloy.

Assignees

• Mitsubishi Materials Corp

Inventors

• Terasaki Nobuyuki

Classifications

• H10W40/258

  Metallic materials (H10W40/254, H10W40/257, H10W40/255, H10W40/251, H10W40/253 take precedence) · CPC title

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W40/255

  having a laminate or multilayered structure, e.g. direct bond copper [DBC] ceramic substrates · CPC title

• H10W40/10

  Arrangements for heating · CPC title

• H10W70/60

  Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) · CPC title