System and method for compensating for a droop event

Patent metadata

Field	Value
Publication number	US-10996738-B2
Application number	US-201816224638-A
Country	US
Kind code	B2
Filing date	Dec 18, 2018
Priority date	Dec 18, 2018
Publication date	May 4, 2021
Grant date	May 4, 2021

Abstract

A system includes a controller configured to receive a signal indicating whether a droop event has occurred. The system also includes a plurality of delay elements where each delay element of the plurality of delay elements responsive to a signal from the controller receives an input signal and outputs an output signal that is a delayed version of the input signal. At least one delay element of the plurality of delay elements receives a clocking signal as its input signal. The system also includes a selector configured to select rising edges and falling edges of output signals from the plurality of delay elements to form a modified clocking signal. The modified clocking signal is a modified version of the clocking signal.

First claim

What is claimed is:

1. A system comprising:
a droop detection circuitry configured to determine whether a droop event has occurred by determining a half cycle of a clocking signal using a first plurality of delay elements, wherein the droop detection circuitry is further configured to output a signal indicating whether the droop event has occurred;
a second plurality of delay elements, wherein each delay element of the second plurality of delay elements responsive to the signal indicating that the droop event has occurred is configured to receive the clocking signal and further configured to delay the clocking signal to form an output clocking signal; and
a controller configured to select a rising edge from the output clocking signal of a delay element of the second plurality of delay elements and wherein the controller is further configured to select a falling edge from the output clocking signal of another delay element of the second plurality of delay elements to form a modified clocking signal.

2. The system as described in claim 1 , wherein subsequent rising edges and subsequent falling edges are selected from remainder of the second plurality of delay elements to form a remainder of the modified clocking signal.

3. The system as described in claim 1 , wherein delay elements of the second plurality of delay elements are positioned in series.

4. The system as described in claim 3 , wherein a first delay element of the second plurality of delay elements is configured to receive the clocking signal and wherein a subsequent delay element of the second plurality of delay elements is configured to receive the output clocking signal from a preceding delay element as its clocking signal.

5. The system as described in claim 1 , wherein delay elements of the second plurality of delay elements are programmable to delay their respective input signal by a delay amount.

6. The system as described in claim 5 , wherein the delay amount associated with one delay element of the second plurality of delay elements is different from the delay amount associated with another delay element of the second plurality of delay elements.

7. The system as described in claim 1 further comprising a multiplexer configured to receive the signal indicating whether the droop event has occurred, and wherein the multiplexer is configured to selectively control each delay element of the second plurality of delay elements to delay their respective input signal by a delay amount.

8. The system as described in claim 7 , wherein the delay amount associated with one delay element of the second plurality of delay elements is different from the delay amount associated with another delay element of the second plurality of delay elements.

9. A system comprising:
a controller configured to receive a signal indicating whether a droop event has occurred in the system;
a plurality of delay elements, wherein each delay element of the plurality of delay elements responsive to a signal from the controller receives an input signal and outputs an output signal that is a delayed version of the input signal, wherein at least one delay element of the plurality of delay elements receives a clocking signal as its input signal; and
a selector configured to select rising edges and falling edges of output signals from the plurality of delay elements to form a modified clocking signal, wherein the modified clocking signal, wherein the controller is further configured to selectively control each delay element of the plurality of delay elements to delay their respective input signal by a programmable delay amount is a modified version of the clocking signal.

10. The system as described in claim 9 , wherein the selector is configured to select a rising edge from an output signal of a delay element of the plurality of delay elements and further configured to select a subsequent falling edge for the rising edge from an output signal of another delay element of the plurality of delay elements.

11. The system as described in claim 9 , wherein delay elements of the plurality of delay elements are daisy chained to one another.

12. The system as described in claim 11 , wherein a first delay element of the plurality of delay elements is configured to receive the clocking signal and wherein input signals to subsequent delay elements of the plurality of delay elements are output signals from preceding delay elements of the plurality of delay elements.

13. The system as described in claim 9 , wherein the plurality of delay elements are programmable to delay their respective input signal by a delay amount.

14. The system as described in claim 13 , wherein the delay amount associated with one delay element of the plurality of delay elements is different from the delay amount associated with another delay element of the plurality of delay elements.

15. The system as described in claim 9 wherein the controller is a multiplexer configured to receive the signal indicating whether the droop event has occurred.

16. The system as described in claim 15 , wherein the delay amount associated with one delay element of the plurality of delay elements is different from the delay amount associated with another delay element of the plurality of delay elements.

17. A method comprising:
determining a half cycle of a clocking signal using a plurality of delay elements;
receiving a signal indicating whether a droop event has occurred based on determining the half cycle of the clocking signal using the plurality of delay elements;
receiving the clocking signal;
in response to receiving the signal indicating that the droop event has occurred, delaying the clocking signal by a first delay amount to form a first delayed clocking signal;
outputting the first delayed clocking signal;
receiving the first delayed clocking signal;
delaying the first delayed clocking signal by a second delay amount to form a second delayed clocking signal; and
selectively selecting rising edges and falling edges from the clocking signal, the first delayed clocking signal, and the second delayed clocking signal to form a modified clocking signal.

18. The method as described in claim 17 , wherein the first delay amount is different from the second delay amount.

19. The method as described in claim 17 , wherein the first delay amount and the second delay amount are programmable.

20. The method as described in claim 17 further comprising delaying the clocking signal by a third delay amount and wherein the modified clocking signal is further based on selectively selecting a rising or falling edge from the third delayed clocking signal.

Assignees

• Cavium Llc
• Marvell Asia Pte Ltd

Inventors

• Sugumar Rabin
• Upputuri Bharath
• Kauffman Bruce
• Waraich Novinder
• Koradia Bivraj
• Sebata Paul

Classifications

• G06F1/324 Primary

  by lowering clock frequency · CPC title

• G06F1/305

  in the event of power-supply fluctuations · CPC title

• G06F1/3296

  by lowering the supply or operating voltage · CPC title

• Y02D10/00

  Energy efficient computing, e.g. low power processors, power management or thermal management · CPC title

• G06F1/08 Primary

  Clock generators with changeable or programmable clock frequency · CPC title