Power control circuit and semiconductor apparatus including the power control circuit

Patent metadata

Field	Value
Publication number	US-10990147-B2
Application number	US-201916572080-A
Country	US
Kind code	B2
Filing date	Sep 16, 2019
Priority date	Nov 29, 2018
Publication date	Apr 27, 2021
Grant date	Apr 27, 2021

Abstract

A semiconductor apparatus may include a logic circuit and a power control circuit. The logic circuit operates by being supplied with power through a power line. The power control circuit includes a plurality of power switches, and supplies a first power supply voltage and a second power supply voltage to the power line. When a mode of the semiconductor apparatus is changed, the power control circuit causes the plurality of power switches to sequentially stop supplying one of the first power supply voltage and the second power supply voltage to the power line, and then causes the plurality of power switches to sequentially supply the other of the first power supply voltage and the second power supply voltage to the power line.

First claim

What is claimed is:

1. A power control circuit comprising:
a delay chain configured to generate a second forward switching signal by delaying a first forward switching signal, and generate a second backward switching signal by delaying a first backward switching signal;
a first power switch configured to supply one of a first power supply voltage and a second power supply voltage to a power line based on a mode change signal, the first forward switching signal and the second backward switching signal; and
a second power switch configured to generate the first backward switching signal based on the second forward switching signal, and supply one of the first power supply voltage and the second power supply voltage to the power line based on the mode change signal, the second forward switching signal and the first backward switching signal.

2. The power control circuit according to claim 1 , wherein the first power switch comprises:
a high power switch configured to supply the first power supply voltage to the power line based on the mode change signal, the first forward switching signal and the second backward switching signal; and
a low power switch configured to supply the second power supply voltage to the power line based on the mode change signal, the first forward switching signal and the second backward switching signal.

3. The power control circuit according to claim 2 , wherein the high power switch comprises:
a first selector configured to output one of the first forward switching signal and the second backward switching signal based on the mode change signal; and
a first driver configured to supply the first power supply voltage to the power line based on an output of the first selector.

4. The power control circuit according to claim 2 , wherein the low power switch comprises:
a second selector configured to output one of the second backward switching signal and the first forward switching signal based on the mode change signal; and
a second driver configured to supply the second power supply voltage to the power line based on an output of the second selector.

5. The power control circuit according to claim 1 , wherein the second power switch comprises:
a high power switch configured to supply the first power supply voltage to the power line based on the mode change signal, the second forward switching signal and the first backward switching signal; and
a low power switch configured to supply the second power supply voltage to the power line based on the mode change signal, the second forward switching signal and the first backward switching signal,
wherein the high power switch generates the first backward switching signal to be inputted to the low power switch, based on the received second forward switching signal, and the low power switch generates the first backward switching signal to be inputted to the high power switch, based on the received second forward switching signal.

6. The power control circuit according to claim 5 , wherein the high power switch comprises:
a first selector configured to output one of the second forward switching signal and the first backward switching signal based on the mode change signal; and
a first driver configured to supply the first power supply voltage to the power line based on an output of the first selector.

7. The power control circuit according to claim 6 , wherein the low power switch comprises:
a second selector configured to output one of the first backward switching signal and the second forward switching signal based on the mode change signal; and
a second driver configured to supply the second power supply voltage to the power line based on an output of the second selector,
wherein the first backward switching signal to be inputted to the first selector is generated based on the output of the second selector, and the first backward switching signal to be inputted to the second selector is generated based on the output of the first selector.

8. A power control circuit comprising:
a delay chain configured to generate a second high gating signal and a second low gating signal by delaying a first high gating signal and a first low gating signal, and generate a second high switching signal and a second low switching signal by delaying a first high switching signal and a first low switching signal;
a first power switch configured to supply a first power supply voltage and a second power supply voltage to a power line based on the first high gating signal, the first low gating signal, the second high switching signal and the second low switching signal; and
a second power switch configured to supply the first power supply voltage and the second power supply voltage to the power line based on the second high gating signal, the second low gating signal, the first high switching signal and the first low switching signal, generate the first high switching signal based on the second high gating signal, and generate the first low switching signal based on the second low gating signal.

9. The power control circuit according to claim 8 , wherein the first power switch comprises:
a high power switch configured to supply the first power supply voltage to the power line based on the first high gating signal and the second low switching signal; and
a low power switch configured to supply the second power supply voltage to the power line based on the first low gating signal and the second high switching signal.

10. The power control circuit according to claim 9 , wherein the high power switch comprises:
a first logic gate configured to gate the first high gating signal and the second low switching signal; and
a first driver configured to supply the first power supply voltage to the power line based on an output of the first logic gate.

11. The power control circuit according to claim 9 , wherein the low power switch comprises:
a second logic gate configured to gate the first low gating signal and the second high switching signal; and
a second driver configured to supply the second power supply voltage to the power line based on an output of the second logic gate.

12. The power control circuit according to claim 8 , wherein the second power switch comprises:
a high power switch configured to generate the first high switching signal based on the second high gating signal and the first low switching signal, and supply the first power supply voltage to the power line based on the first high switching signal; and
a low power switch configured to generate the first low switching signal based on the second low gating signal and the first high switching signal, and supply the second power supply voltage to the power line based on the first low switching signal.

13. The power control circuit according to claim 12 , wherein the high power switch comprises:
a first logic gate configured to generate the first high switching signal by gating the second high gating signal and the first low switching signal; and
a first driver configured to supply the first power supply voltage to the power line based on the first high switching signal.

14. The power control circuit according to claim 12 , wherein the low power switch comprises:
a second logic gate configured to generate the first low switching signal by gating the second low gating signal and the first high switching signal; and
a second driver configured to supply the second power supply voltage to the power line based on the first low switching signal.

15. A semiconductor apparatus comprising:
at least one logic circuit configured to operate by being supplied with power through a power line

Assignees

• Sk Hynix Inc

Inventors

• Kim Woongrae
• Yoon Sang Sic

Classifications

• G11C2207/2254

  Calibration · CPC title

• G11C7/22

  Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management · CPC title

• G11C5/147 Primary

  Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops (G11C5/141 takes precedence) · CPC title

• G06F1/26 Primary

  Power supply means, e.g. regulation thereof (for memories G11C) · CPC title

• G06F1/3206

  Monitoring of events, devices or parameters that trigger a change in power modality · CPC title