Solid-state image pickup device and control method of solid-state image pickup device

Patent metadata

Field	Value
Publication number	US-10986291-B2
Application number	US-202016807246-A
Country	US
Kind code	B2
Filing date	Mar 3, 2020
Priority date	Mar 20, 2019
Publication date	Apr 20, 2021
Grant date	Apr 20, 2021

Abstract

A solid-state image pickup device according to an embodiment is a solid-state image pickup device including a first pixel row, a second pixel row, and a third pixel row that are arranged in a horizontal direction. In the solid-state image pickup device, a first control pulse for transferring charges of first accumulation portions of the fourth and sixth CCD registers in a vertical direction perpendicular to the horizontal direction and a second control pulse for transferring charges of second accumulation portions of the fourth and sixth CCD registers in the horizontal direction are input to the fourth and sixth CCD registers such that an Hi period of the first control pulse and an Hi period of the second control pulse do not overlap each other in a timing period in which charges accumulated in the first, second, and third pixel rows are transferred.

First claim

What is claimed is:

1. A solid-state image pickup device comprising a first pixel row, a second pixel row, and a third pixel row that are arranged in a horizontal direction, in which a distance between the first pixel row and the second pixel row and a distance between the second pixel row and the third pixel row are two lines, the solid-state image pickup device further comprising:
a first CCD register configured to hold charges of odd-numbered pixels of the first pixel row;
a second CCD register configured to hold charges of even-numbered pixels of the first pixel row;
a third CCD register configured to hold charges of odd-numbered pixels of the second pixel row;
a fourth CCD register configured to hold charges of even-numbered pixels of the second pixel row;
a fifth CCD register configured to hold charges of odd-numbered pixels of the third pixel row; and
a sixth CCD register configured to hold charges of even-numbered pixels of the third pixel row, wherein
a first control pulse for transferring charges of first accumulation portions of the fourth and sixth CCD registers in a vertical direction perpendicular to the horizontal direction and a second control pulse for transferring charges of second accumulation portions of the fourth and sixth CCD registers in the horizontal direction are input to the fourth and sixth CCD registers such that an Hi period of the first control pulse and an Hi period of the second control pulse do not overlap each other in a timing period in which charges accumulated in the first, second, and third pixel rows are transferred.

2. The solid-state image pickup device according to claim 1 , wherein
first transfer gates that read charges of odd-numbered pixels and even-numbered pixels of the first pixel row are arranged adjacent to the first pixel row in a first direction,
second transfer gates that read charges of odd-numbered pixels of the second pixel row are arranged adjacent to the second pixel row in the first direction,
third transfer gates that read charges of even-numbered pixels of the second pixel row are arranged adjacent to the second pixel row in a second direction opposite to the first direction, and
fourth transfer gates that read charges of odd-numbered pixels and even-numbered pixels of the third pixel row are arranged adjacent to the third pixel row in the second direction.

3. The solid-state image pickup device according to claim 2 , wherein
the first CCD register, the second CCD register, and the third CCD register are arranged in the first direction, and
the fourth CCD register, the fifth CCD register, and the sixth CCD register are arranged in the second direction.

4. The solid-state image pickup device according to claim 1 , further comprising:
a first storage portion;
a second storage portion;
a first drain portion for discharging dark charges accumulated in the first storage portion; and
a second drain portion for discharging dark charges accumulated in the second storage portion.

5. The solid-state image pickup device according to claim 1 , wherein
the first pixel row is a pixel row corresponding to blue,
the second pixel row is a pixel row corresponding to green, and
the third pixel row is a pixel row corresponding to red.

6. A control method of a solid-state image pickup device, the solid-state image pickup device including a first pixel row, a second pixel row, and a third pixel row that are arranged in a horizontal direction and further including a first CCD register configured to hold charges of odd-numbered pixels of the first pixel row, a second CCD register configured to hold charges of even-numbered pixels of the first pixel row, a third CCD register configured to hold charges of odd-numbered pixels of the second pixel row, a fourth CCD register configured to hold charges of even-numbered pixels of the second pixel row, a fifth CCD register configured to hold charges of odd-numbered pixels of the third pixel row, and a sixth CCD register configured to hold charges of even-numbered pixels of the third pixel row, in which a distance between the first pixel row and the second pixel row and a distance between the second pixel row and the third pixel row are two lines, the control method comprising
inputting to the fourth and sixth CCD registers a first control pulse for transferring charges of first accumulation portions of the fourth and sixth CCD registers in a vertical direction perpendicular to the horizontal direction and a second control pulse for transferring charges of second accumulation portions of the fourth and sixth CCD registers in the horizontal direction such that an Hi period of the first control pulse and an Hi period of the second control pulse do not overlap each other in a timing period in which charges accumulated in the first, second, and third pixel rows are transferred.

Assignees

• Toshiba Kk
• Toshiba Electronic Devices & Storage Corp

Inventors

• Takahashi Masao

Classifications

• H04N25/626

  Reduction of noise due to residual charges remaining after image readout, e.g. to remove ghost images or afterimages · CPC title

• H04N25/621 Primary

  for the control of blooming · CPC title

• H04N25/713

  Transfer or readout registers; Split readout registers or multiple readout registers · CPC title

• H04N25/11

  Arrangement of colour filter arrays [CFA]; Filter mosaics · CPC title

• H10F39/158

  having arrangements for blooming suppression · CPC title