Method and precursors for manufacturing 3D devices

Patent metadata

Field	Value
Publication number	US-10985013-B2
Application number	US-201916430882-A
Country	US
Kind code	B2
Filing date	Jun 4, 2019
Priority date	Jan 29, 2015
Publication date	Apr 20, 2021
Grant date	Apr 20, 2021

Abstract

Described herein is an apparatus comprising a plurality of silicon-containing layers wherein the silicon-containing layers are selected from a silicon oxide and a silicon nitride layer or film. Also described herein are methods for forming the apparatus to be used, for example, as 3D vertical NAND flash memory stacks. In one particular aspect or the apparatus, the silicon oxide layer comprises slightly compressive stress and good thermal stability. In this or other aspects of the apparatus, the silicon nitride layer comprises slightly tensile stress and less than 300 MPa stress change after up to about 800° C. thermal treatment. In this or other aspects of the apparatus, the silicon nitride layer etches much faster than the silicon oxide layer in hot H3PO4, showing good etch selectivity.

First claim

The invention claimed is:

1. A method for depositing a plurality of silicon-containing layers comprising a silicon oxide layer and a silicon nitride layer on at least one surface of a substrate, the method comprising:
providing the at least one surface of the substrate in a reaction chamber;
introducing into the reaction chamber at least one first silicon precursor selected from compounds having Formula III, optionally in combination with at least one second silicon precursor selected from compounds having Formula II:

wherein R is each independently selected from a hydrogen, linear or branched C 2 to C 10 alkyl group; a linear or branched C 2 to C 12 alkenyl group; a linear or branched C 2 to C 12 alkynyl group; a C 4 to C 10 cyclic alkyl group; and a C 6 to C 10 aryl group; and R 1 is each independently selected from a linear or branched C 1 to C 10 alkyl group; a linear or branched C 3 to C 12 alkenyl group; a linear or branched C 3 to C 12 alkynyl group; a C 4 to C 10 cyclic alkyl group; and a C 6 to C 10 aryl group;
introducing into the reaction chamber a source selected from an oxygen-containing source and a nitrogen-containing source; and
depositing via a vapor deposition process the plurality of silicon-containing layers on the at least one surface of the substrate wherein the vapor deposition process is selected from a group consisting of chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD), cyclic chemical vapor deposition (CCVD), plasma enhanced cyclic chemical vapor deposition (PECCVD), atomic layer deposition (ALD), and plasma enhanced atomic layer deposition (PEALD); preferably plasma enhanced chemical vapor deposition (PECVD);
wherein the at least one silicon oxide layer comprises one or more of the following properties selected from a density of about 1.9 grams per cubic centimeter (g/cm 3 or g/cc) or greater; a hydrogen content of 4×10 22 atoms/cm 3 or less; a stress ranging from about −300 MPa to −100 MPa, a dielectric constant of 4.5 or lower, a leakage current of 10 −9 A/cm 2 or lower at a film breakdown field of 8 MV/cm or higher; and combinations thereof; and
wherein the at least one silicon nitride layer described herein comprises one or more of the following properties: a density of about 2.2 g/cm 3 or greater; a hydrogen content of about 4×10 22 atoms/cm 3 or lower, a stress ranging from about 50 MPa to about 300 MPa; a stress change of 300 MPa or less after at least one thermal treatment ranging from about 700 to about 1,000° C., a wet etch rate of 10 nm/min or greater in hot H 3 PO 4 , and combinations thereof.

2. The method of claim 1 wherein the silicon oxide layer comprises at least one or more of the following properties: a density of about 2.2/cm 3 or greater, a stress ranging from about −300 to about −100 MPa, a stress shift of 50 MPa or less after up to 800° C. thermal treatment, and combinations thereof.

3. The method of claim 1 wherein the silicon nitride layer comprises at least one or more of the following properties: a density of about 2.3 g/cm 3 or greater, a stress ranging from about 50 to about 300 MPa, a stress shift of 300 MPa or less after up to 800° C. thermal treatment, and combinations thereof.

4. The method of claim 1 wherein the silicon oxide layer has a deposition rate ranging from about 50 nm/min to about 500 nm/min.

5. The method of claim 1 wherein the oxygen-containing source is selected from the group consisting of water (H 2 O), oxygen (O 2 ), oxygen plasma, ozone (O 3 ), NO, N 2 O, carbon monoxide (CO), carbon dioxide (CO 2 ), N 2 O plasma, carbon monoxide (CO) plasma, carbon dioxide (CO 2 ) plasma, and combinations thereof.

6. The method of claim 1 wherein the nitrogen-containing source is selected from the group consisting of ammonia, hydrazine, monoalkylhydrazine, dialkylhydrazine, nitrogen, nitrogen plasma, nitrogen/hydrogen, nitrogen/helium, nitrogen/argon plasma, ammonia plasma, ammonia/helium plasma, ammonia/argon plasma, ammonia/nitrogen plasma, NF 3 , NF 3 plasma, and mixtures thereof.

7. The method of claim 1 wherein the temperature of the depositing step ranges from about 425° C. to about 600° C.

8. The method of claim 1 wherein the deposition process is plasma enhanced chemical vapor deposition (PECVD) or PECCVD.

9. The method of claim 1 wherein the silicon precursor comprises trisilylamine.

10. The method of claim 1 wherein the silicon-containing layer is subjected to a thermal annealing at temperature up to 1000° C.

11. The method of claim 1 wherein the silicon oxide layer comprises substantially zero shrinkage or a shrinkage of about 3% or less or 2% or less or 1% or less and about 50 MPa stress change after thermal treatment up to 800° C.

12. The method of claim 1 wherein the silicon oxide layer comprises substantially zero wet etch rate in hot H 3 PO 4 .

13. The method of claim 1 wherein the silicon nitride layer comprises a growth rate of 50 nm/min or higher.

14. The method of claim 1 wherein the silicon nitride layer comprises a minimal shrinkage and less than 300 MPa stress change after thermal treatment up to 800° C.

15. The method of claim 1 wherein the number of stacked silicon-containing films comprises alternating silicon oxide and silicon nitride wherein the number of layer of silicon oxide layers ranges from about 48 to about 128 layers and the number of silicon nitride layers is from about 48 to about 128 layers; each silicon oxide layer has identical thickness and each silicon nitride layer has identical thickness.

16. A method for forming an apparatus comprising a plurality of silicon-containing layers wherein the plurality of silicon-containing layers are selected from a silicon oxide layer and a silicon nitride layer on at least a surface of a semiconductor substrate, the method comprising:
providing the at least one surface of the semiconductor substrate;
introducing into a reaction chamber at least one first silicon precursor selected from compounds having Formula III, optionally in combination with at least one second silicon precursor selected from compounds having Formula II:

wherein R is each independently selected from a hydrogen, linear or branched C 2 to C 10 alkyl group; a linear or branched C 3 to C 12 alkenyl group; a linear or branched C 3 to C 12 alkynyl group; a C 4 to C 10 cyclic alkyl group; and a C 6 to C 10 aryl group; and R 1 is each independently selected from a linear or branched C 1 to C 10 alkyl group; a linear or branched C 3 to C 12 alkenyl group; a linear or branched C 3 to C 12 alkynyl group; a C 4 to C 10 cyclic alkyl group; and a C 6 to C 10 aryl group;
introducing into the reaction chamber a nitrogen-containing source;
depositing via a vapor deposition process the silicon nitride layer;
introducing at least one silicon-containing precursor selected from the group consisting of silane, disilane, tetraethoxysilane (TEOS), triethoxysilane (TES), tetramethoxysilane, trimethoxysilane, di-tert-butoxysilane (DTBOS), di-tert-pentoxysilane (DTPOS), diethylsilane, triethylsilane, diethoxymethylsilane, dimethoxymethylsilane, di(tertiary)butoxymethylsilane, methyltriacetatoxysilane, dimethylacetatoxysilane, dimethyldiacetoxysilane, dimethyldimethoxysilane, dimethyldiethoxysilane, methyltriethoxysilane, neohexyltriethoxysilane, neope

Assignees

• Versum Mat Us Llc

Inventors

• Li Jianheng
• Ridgeway Robert G
• Lei Xinjian
• Vrtis Raymond N
• Han Bing
• Rao Madhukar B

Classifications

• H10P14/69433

  the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz · CPC title

• H10P14/69215 Primary

  the material being a silicon oxide, e.g. SiO2 · CPC title

• H10P14/6336

  in the presence of a plasma [PECVD] · CPC title

• H10P14/6687 Primary

  the compound comprising silicon and nitrogen · CPC title

• H10P14/6339

  deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD · CPC title