Data storage device using host memory buffer and method of operating the same

Patent metadata

Field	Value
Publication number	US-10983722-B2
Application number	US-201916506613-A
Country	US
Kind code	B2
Filing date	Jul 9, 2019
Priority date	Oct 24, 2018
Publication date	Apr 20, 2021
Grant date	Apr 20, 2021

Abstract

A data storage device includes a nonvolatile memory device, a storage controller and a mapping controller. The nonvolatile memory device stores an execution code that controls operations of the data storage device. The storage controller uploads and stores the execution code from the nonvolatile memory device to a host memory buffer included in an external host device, and downloads the execution code in realtime from the host memory buffer to execute the execution code that is downloaded from the host memory buffer. The mapping controller manages a mapping table including mapping relations between the execution code and host addresses of the host memory buffer at which the execution code is stored. A speed of accessing the execution code is increased and performance of the data storage device is enhanced by using the host memory buffer as storage of the execution code to control the operation of the data storage device.

First claim

What is claimed is:

1. A data storage device comprising:
a nonvolatile memory device configured to store an execution code that controls operations of the data storage device;
a storage controller configured to upload and store the execution code from the nonvolatile memory device to a host memory buffer included in an external host device during an initialization operation of the data storage device, and to download the execution code in realtime from the host memory buffer and execute the execution code downloaded from the host memory buffer during operation of the data storage device after the initialization operation is complete; and
a mapping controller configured to manage a mapping table including mapping relations between the execution code and host addresses of the host memory buffer at which the execution code is stored.

2. The data storage device of claim 1 , wherein the execution code comprises a plurality of code sections, and the mapping controller is configured to store in the mapping table the host addresses of uploaded code sections that are uploaded to the host memory buffer from among the plurality of code sections.

3. The data storage device of claim 2 , wherein the storage controller is configured to upload all of the plurality of code sections to the host memory buffer during the initialization operation of the data storage device.

4. The data storage device of claim 2 , wherein the storage controller is configured to upload a portion of the plurality of code sections to the host memory buffer during the initialization operation of the data storage device or during the operation after the initialization operation is complete.

5. The data storage device of claim 4 , wherein the storage controller is configured to perform an updating operation to replace the uploaded portion of the plurality of code sections stored in the host memory buffer with other code sections from among the plurality of code sections.

6. The data storage device of claim 5 , wherein the mapping controller is configured to store priority information in the mapping table, the priority information representing access importance or access frequency of the plurality of code sections.

7. The data storage device of claim 6 , wherein the mapping controller is configured to provide, based on the priority information, an address of an uploaded code section having a lowest priority from among the uploaded portion of the plurality of code sections to the storage controller for the updating operation.

8. The data storage device of claim 2 , further comprising an internal memory that is a random access memory,
wherein the storage controller is configured to load and store a portion of the plurality of code sections from the nonvolatile memory device to the internal memory.

9. The data storage device of claim 8 , wherein the mapping controller is configured to store in the mapping table internal addresses of the portion of the plurality of code sections stored in the internal memory.

10. The data storage device of claim 8 , wherein at least a portion of the uploaded code sections stored in the host memory buffer overlaps with the portion of the plurality of code sections stored in the internal memory.

11. The data storage device of claim 2 , further comprising:
a security engine configured to encode the execution code to generate a secured execution code,
wherein the storage controller is configured to upload the secured execution code to the host memory buffer.

12. The data storage device of claim 11 , wherein the security engine is further configured to download in realtime the secured execution code from the host memory buffer, and decode the downloaded secured execution code to provide the execution code to the storage controller.

13. The data storage device of claim 11 , wherein the security engine comprises:
a key register configured to store a security key; and
an encrypting and decrypting unit configured to encrypt the execution code based on the security key to provide the secured execution code, and configured to decrypt the secured execution code to provide the execution code.

14. The data storage device of claim 13 , wherein the encrypting and decrypting unit is configured to generate an encrypted signature with respect to the execution code based on the security key, and combine the encrypted signature in the secured execution code.

15. The data storage device of claim 14 , wherein the encrypting and decrypting unit is configured to decrypt the encrypted signature in the secured execution code to generate a decryption signature, and provide the execution code based on the decryption signature.

16. The data storage device of claim 11 , wherein the security engine comprises:
a seed generator configured to generate a seed value; and
a randomizing and derandomizing unit configured to randomize the execution code based on the seed value to provide the secured execution code, and configured to derandomize the secured execution code to provide the execution code.

17. The data storage device of claim 1 , wherein the storage controller is configured to store the mapping table in the nonvolatile memory device before the data storage device enters a power-down mode.

18. The data storage device of claim 17 , wherein the storage controller is configured to load the mapping table stored in the nonvolatile memory device to the mapping controller and download the execution code stored in the host memory buffer based on the mapping table, when the data storage device is awakened from the power-down mode.

19. A data storage device comprising:
a nonvolatile memory device configured to store an execution code that controls operations of the data storage device;
a security engine configured to encode the execution code to generate a secured execution code;
a storage controller configured to upload and store the secured execution code to a host memory buffer included in an external host device, and to download the secured execution code in realtime from the host memory buffer to provide the downloaded secured execution code to the security engine; and
a mapping controller configured to manage a mapping table including mapping relations between the execution code and host addresses of the host memory buffer at which the secured execution code is stored,
wherein the security engine is further configured to decode the downloaded secured execution code to provide the execution code, and
the storage controller is further configured to execute the execution code provided from the security engine.

20. A method of operating a data storage device, comprising:
uploading and storing, by a storage controller included in the data storage device, an execution code that controls operations of the data storage device from a nonvolatile memory device included in the data storage device to a host memory buffer included in a host device, the uploading and storing during an initialization operation of the data storage device;
downloading, by the storage controller, the execution code in realtime from the host memory buffer and executing the execution code downloaded from the host memory buffer, the downloading during operation of the data storage device after the initialization operation is complete; and
managing, by a mapping controller included in the data storage device, a mapping table including mapping relations between the execution code and host addresses of the host memory buffer at which the execution code is stored.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Kim Hyun-Seok
• Jun Walter

Classifications

• G06F1/3206

  Monitoring of events, devices or parameters that trigger a change in power modality · CPC title

• G06F3/0607

  by facilitating the process of upgrading existing storage systems, e.g. for improving compatibility between host and storage device · CPC title

• H04L9/3247

  involving digital signatures · CPC title

• G06F3/061 Primary

  Improving I/O performance · CPC title

• G06F3/0659

  Command handling arrangements, e.g. command buffers, queues, command scheduling · CPC title