Current-limiting circuit for a power amplifier

Patent metadata

Field	Value
Publication number	US-10979002-B2
Application number	US-201816031834-A
Country	US
Kind code	B2
Filing date	Jul 10, 2018
Priority date	Jul 11, 2017
Publication date	Apr 13, 2021
Grant date	Apr 13, 2021

Abstract

Certain aspects of the present disclosure provide methods and apparatus for current-limiting protection of an amplifier, such as a power amplifier in a radio frequency (RF) front-end. One example current-limiting circuit generally includes a node coupled to a current source, a plurality of current-sinking devices coupled to the node, one or more switches coupled between the node and at least one of the plurality of current-sinking devices, and a bias circuit having an input coupled to the node and an output for coupling to an input of the amplifier.

First claim

What is claimed is:

1. A current-limiting circuit for an amplifier, comprising:
a node coupled to a current source;
a plurality of current-sinking devices coupled to the node;
one or more switches coupled between the node and at least one of the plurality of current-sinking devices; and
a bias circuit having an input coupled to the node via a first path and an output for coupling to an input of the amplifier, wherein the one or more switches are not disposed in the first path.

2. The circuit of claim 1 , wherein the bias circuit comprises a buffer implemented as an emitter follower.

3. The circuit of claim 2 , wherein the emitter follower comprises a transistor having a base coupled to the node, an emitter for coupling to the input of the amplifier, and a collector for coupling to a power supply rail for the circuit.

4. The circuit of claim 3 , wherein the transistor comprises a heterojunction bipolar transistor (HBT).

5. The circuit of claim 1 , wherein at least one of the plurality of current-sinking devices comprises one or more diode devices.

6. The circuit of claim 5 , wherein the one or more diode devices comprise a diode-connected transistor.

7. The circuit of claim 6 , wherein the diode-connected transistor comprises a heterojunction bipolar transistor (HBT) having a collector and a base coupled to the collector.

8. The circuit of claim 1 , wherein at least one of the plurality of current-sinking devices comprises two diode devices connected in series.

9. A current-limiting circuit for an amplifier, comprising:
a node coupled to a current source;
a plurality of current-sinking devices coupled to the node;
one or more switches coupled between the node and at least one of the plurality of current-sinking devices; and
a bias circuit having an input coupled to the node and an output for coupling to an input of the amplifier,
wherein at least one of the plurality of current-sinking devices is connected directly to the node.

10. The circuit of claim 1 , wherein a number of the one or more switches that are configured to be closed is dependent on an output current from the current source.

11. The circuit of claim 1 , further comprising a resistive element having a first end coupled to the output of the bias circuit and a second end for coupling to the input of the amplifier.

12. The circuit of claim 1 , wherein the current source is configured based on temperature.

13. The circuit of claim 1 , wherein the current source is configured to provide a substantially constant current.

14. The circuit of claim 1 , wherein the amplifier comprises a power amplifier configured to output radio frequency signals.

15. A method of current-limiting an amplifier, comprising:
sourcing a supply current to a node, the node being coupled to a plurality of current-sinking devices;
supplying a bias current to an input of the amplifier via a bias circuit having an input coupled to the node and an output coupled to the input of the amplifier; and
selectively closing one or more switches coupled between the node and at least one of the plurality of current-sinking devices to adjust a reference current derived from the supply current, the reference current limiting an input current for the bias circuit to be no greater than the reference current, the input current for the bias circuit being based on the bias current and being drawn from the node without passing through the one or more switches.

16. The method of claim 15 , wherein the amplifier comprises a transistor and wherein the bias current is a base current for the transistor and is proportional to a collector current for the transistor.

17. The method of claim 15 , wherein:
the bias circuit comprises a buffer implemented as an emitter follower;
the emitter follower comprises a transistor having a base coupled to the node, an emitter coupled to the input of the amplifier, and a collector for coupling to a power supply rail;
the input current for the bias circuit is a base current for the transistor; and
the bias current is an emitter current for the transistor and is proportional to the base current according to a beta of the transistor.

18. The method of claim 17 , wherein the transistor comprises a heterojunction bipolar transistor (HBT).

19. The method of claim 15 , wherein at least one of the plurality of current-sinking devices comprises one or more diode devices.

20. The method of claim 19 , wherein the one or more diode devices comprise a diode-connected transistor.

21. The method of claim 20 , wherein the diode-connected transistor comprises a heterojunction bipolar transistor (HBT) having a collector and a base coupled to the collector.

22. A method of current-limiting an amplifier, comprising:
sourcing a supply current to a node, the node being coupled to a plurality of current-sinking devices;
supplying a bias current to an input of the amplifier via a bias circuit having an input coupled to the node and an output coupled to the input of the amplifier; and
selectively closing one or more switches coupled between the node and at least one of the plurality of current-sinking devices to adjust a reference current derived from the supply current, the reference current limiting an input current for the bias circuit to be no greater than the reference current, the input current for the bias circuit being based on the bias current,
wherein at least one of the plurality of current-sinking devices is connected directly to the node.

23. The method of claim 15 , wherein the selectively closing comprises selectively closing a number of the one or more switches based on the supply current sourced to the node.

24. The method of claim 15 , wherein the selectively closing comprises selectively closing a number of the one or more switches to adjust a linearity of the amplifier.

25. The method of claim 15 , wherein the sourcing comprises configuring the supply current to establish a protection condition for the amplifier.

26. The apparatus of claim 1 , wherein the current source is directly connected to the node.

Assignees

• Qualcomm Inc

Inventors

• Chen Jing-Hwa
• Ryu Jisun
• Hau Yan Kit Gary
• Sun Yanjie
• Wang Xinwei
• Zhang Xiangdong

Classifications

• H03F1/303 Primary

  using a switching device (H03F1/305, H03F3/005, H03F3/38 take precedence) · CPC title

• H03F2200/21

  Bias resistors are added at the input of an amplifier · CPC title

• H03F2200/27

  A biasing circuit node being switched in an amplifier circuit · CPC title

• H03F2200/447

  the amplifier being protected to temperature influence · CPC title

• H03F1/52

  Circuit arrangements for protecting such amplifiers {(monitoring arrangements G01R31/28; increasing reliability in communication systems, e.g. using redundancy H04B1/74)} · CPC title