Pixel circuit

Patent metadata

Field	Value
Publication number	US-10977998-B2
Application number	US-202016943293-A
Country	US
Kind code	B2
Filing date	Jul 30, 2020
Priority date	Aug 21, 2019
Publication date	Apr 13, 2021
Grant date	Apr 13, 2021

Abstract

A pixel circuit includes a main-circuit that controls an organic light-emitting element by controlling a driving current to flow into the organic light-emitting element and a sub-circuit including a first compensation transistor including a gate terminal which receives a first gate signal, a second compensation transistor including a gate terminal which receives a second gate signal, and an initialization transistor including a gate terminal which receives an initialization signal. Here, in a low-frequency driving mode, a driving frequency of the first gate signal is N hertz (Hz), a driving frequency of the initialization signal is N Hz, a driving frequency of the second gate signal is M Hz, the first compensation transistor and the initialization transistor are turned on during a first time duration in N non-light-emitting periods per second, and the second compensation transistor is turned on during a second time duration in M non-light-emitting periods per second.

First claim

What is claimed is:

1. A pixel circuit comprising:
a main circuit including a driving transistor which includes a gate terminal which is connected to a first node, a first terminal which is connected to a second node, and a second terminal which is connected to a third node and an organic light-emitting element which is connected to the driving transistor between a first power voltage and a second power voltage and controls the organic light-emitting element to emit light by controlling a driving current corresponding to a data signal which is applied via a data line to flow into the organic light-emitting element; and
a sub circuit including a first compensation transistor which includes a gate terminal which receives a first gate signal, a first terminal which is connected to the first node, and a second terminal which is connected to a fourth node, a second compensation transistor which includes a gate terminal which receives a second gate signal, a first terminal which is connected to the fourth node, and a second terminal which is connected to the third node, and an initialization transistor which includes a gate terminal which receives an initialization signal, a first terminal which is connected to the first node, and a second terminal which receives an initialization voltage,
wherein in a low-frequency driving mode, a driving frequency of the first gate signal is N Hz, which is a driving frequency of an organic light-emitting display device, where N is a positive integer, a driving frequency of the initialization signal is N hertz, a driving frequency of the second gate signal is M hertz, where M is a positive integer and different from N, the first compensation transistor and the initialization transistor are turned on during a first time duration in N non-light-emitting periods per second, and the second compensation transistor is turned on during a second time duration in M non-light-emitting periods per second.

2. The pixel circuit of claim 1 , wherein in the low-frequency driving mode, the driving frequency of the first gate signal and the driving frequency of the initialization signal are lower than the driving frequency of the second gate signal.

3. The pixel circuit of claim 2 , wherein the first gate signal and the second gate signal are generated, respectively by respective signal generating circuits which are independent of each other.

4. The pixel circuit of claim 1 , wherein the first time duration is equal to the second time duration.

5. The pixel circuit of claim 4 , wherein a turn-on voltage level period of the second gate signal is consistent with a turn-on voltage level period of the first gate signal.

6. The pixel circuit of claim 5 , wherein in a normal non-light-emitting period in which an initializing operation and a threshold voltage compensating and data writing operation are performed, the first compensation transistor and the second compensation transistor are simultaneously turned on and then off after the initialization transistor is turned on and then off.

7. The pixel circuit of claim 6 , wherein in a hold non-light-emitting period in which the initializing operation and the threshold voltage compensating and data writing operation are not performed, only the second compensation transistor is turned on and then off.

8. The pixel circuit of claim 7 , wherein the initialization voltage is changed from a first voltage level to a second voltage level which is higher than the first voltage level at a start point of the hold non-light-emitting period, and the initialization voltage is reset to the first voltage level at a start point of the normal non-light-emitting period.

9. The pixel circuit of claim 8 , wherein the initialization voltage is additionally changed to at least one voltage level which is higher than the second voltage level after the initialization voltage is changed to the second voltage level at the start point of the hold non-light-emitting period.

10. The pixel circuit of claim 1 , wherein the first time duration is longer than the second time duration.

11. The pixel circuit of claim 10 , wherein a turn-on voltage level period of the second gate signal overlaps a turn-on voltage level period of the first gate signal.

12. The pixel circuit of claim 11 , wherein a start point of the turn-on voltage level period of the second gate signal is consistent with a start point of the turn-on voltage level period of the first gate signal, and an end point of the turn-on voltage level period of the second gate signal is before an end point of the turn-on voltage level period of the first gate signal.

13. The pixel circuit of claim 11 , wherein a start point of the turn-on voltage level period of the second gate signal is after a start point of the turn-on voltage level period of the first gate signal, and an end point of the turn-on voltage level period of the second gate signal is consistent with an end point of the turn-on voltage level period of the first gate signal.

14. The pixel circuit of claim 11 , wherein a start point of the turn-on voltage level period of the second gate signal is after a start point of the turn-on voltage level period of the first gate signal, and an end point of the turn-on voltage level period of the second gate signal is before an end point of the turn-on voltage level period of the first gate signal.

15. The pixel circuit of claim 11 , wherein in a normal non-light-emitting period in which an initializing operation and a threshold voltage compensating and data writing operation are performed, the second compensation transistor is turned on and then off while the first compensation transistor is turned on after the initialization transistor is turned on and then off.

16. The pixel circuit of claim 15 , wherein in a hold non-light-emitting period in which the initializing operation and the threshold voltage compensating and data writing operation are not performed, only the second compensation transistor is turned on and then off.

17. The pixel circuit of claim 16 , wherein the initialization voltage is changed from a first voltage level to a second voltage level which is higher than the first voltage level at a start point of the hold non-light-emitting period, and the initialization voltage is reset to the first voltage level at a start point of the normal non-light-emitting period.

18. The pixel circuit of claim 17 , wherein the initialization voltage is additionally changed to at least one voltage level which is higher than the second voltage level after the initialization voltage is changed to the second voltage level at the start point of the hold non-light-emitting period.

19. The pixel circuit of claim 1 , wherein the sub circuit further includes a bypass transistor including a gate terminal which receives a bypass signal, a first terminal which receives the initialization voltage, and a second terminal which is connected to an anode of the organic light-emitting element, and
wherein in the low-frequency driving mode, a driving frequency of the bypass signal is N hertz, and the bypass transistor is turned on during the first time duration in N non-light-emitting periods per second.

20. The pixel circuit of claim 19 , wherein the bypass signal is a same signal as the initialization signal.

Assignees

• Samsung Display Co Ltd

Inventors

• Lee Hyo Jin
• Goh Joon-Chul
• Kwon Sangan
• Nam Hui
• Roh Jin Young
• Park Sehyuk

Classifications

• G09G2320/0204

  Compensation of DC component across the pixels in flat panels · CPC title

• G09G3/3208 Primary

  organic, e.g. using organic light-emitting diodes [OLED] · CPC title

• G09G3/3233 Primary

  with pixel circuitry controlling the current through the light-emitting element · CPC title

• G09G2300/043

  Compensation electrodes or other additional electrodes in matrix displays related to distortions or compensation signals, e.g. for modifying TFT threshold voltage in column driver · CPC title

• G09G2320/0247

  Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes · CPC title