Driving chip, display substrate, display device and method for manufacturing display device

Patent metadata

Field	Value
Publication number	US-10971465-B2
Application number	US-201816125063-A
Country	US
Kind code	B2
Filing date	Sep 7, 2018
Priority date	Nov 10, 2017
Publication date	Apr 6, 2021
Grant date	Apr 6, 2021

Abstract

The present disclosure provides a driving chip, a display substrate, a display device and a method for manufacturing a display device. The driving chip according to the present disclosure includes a substrate; and a plurality of connecting bumps and a plurality of supporting bumps disposed on the substrate. The plurality of connecting bumps include at least one set of connecting bumps arranged along a first direction, and the plurality of supporting bumps include the supporting bump that is located between the adjacent connecting bumps arranged along the first direction.

First claim

What is claimed is:

1. A driving chip, comprising:
a substrate comprising a plurality of supporting bumps disposed thereon;
an input area comprising a plurality of input bumps;
an output area comprising a plurality of output bumps; and
an intermediate area;
wherein the plurality of input bumps comprise at least one set of connecting bumps arranged along a first direction, and the plurality of supporting bumps comprise first supporting bumps that are located between adjacent input bumps arranged along the first direction;
wherein the plurality of output bumps comprise at least one set of connecting bumps arranged along the first direction, and the plurality of supporting bumps comprise first supporting bumps that are located between adjacent output bumps arranged along the first direction;
wherein the plurality of supporting bumps further comprise intermediate area supporting bumps that are regularly disposed within the intermediate area;
wherein a distance between one of the first supporting bumps and its adjacent or neighboring input bump or output bump in the first direction is 30 μm to 40 μm;
wherein the connecting bumps are higher than the first supporting bumps with respect to the substrate, and a size of each of the first supporting bumps is smaller than a size of a neighboring connecting bump;
wherein the connecting bumps are arranged in rows and connecting wirings are arranged in gaps between the rows; and
wherein for connecting bumps in a same row, a first number of first supporting bumps are arranged between two of the connecting bumps in the same row, a second number of first supporting bumps are arranged between another two of the connecting bumps in the same row, the first number is different from the second number.

2. The driving chip according to claim 1 , wherein the plurality of connecting bumps further comprise at least one set of connecting bumps arranged along a second direction that is distinct from the first direction, and the plurality of supporting bumps comprise supporting bumps that are located between adjacent connecting bumps arranged along the second direction.

3. The driving chip according to claim 1 , wherein the plurality of connecting bumps further comprise a set of connecting bumps arranged along a second direction that is distinct from the first direction, and the plurality of supporting bumps comprise the supporting bumps that are arranged along the second direction and correspondingly disposed on at least one side of the set of connecting bumps arranged along the second direction.

4. The driving chip according to claim 1 , wherein the plurality of supporting bumps further comprise supporting bumps that are located on at least one end of the input bumps or output bumps arranged along the first direction.

5. The driving chip according to claim 2 , wherein the plurality of supporting bumps further comprise supporting bumps that are located on at least one end of the connecting bump arranged along the second direction.

6. The driving chip according to claim 3 , wherein the plurality of supporting bumps further comprise supporting bumps that are located on at least one end of the connecting bump arranged along the second direction.

7. The driving chip according to claim 1 , wherein the driving chip is implemented in a display device.

8. The driving chip according to claim 7 , wherein the display device comprises a flexible display panel having a display substrate and a plurality of connecting pads disposed thereon.

9. The driving chip according to claim 8 , wherein the connecting bumps of the driving chip and the connecting pads on the display substrate correspond to each other one to one and are electrically connected to each other.

10. A display device, comprising:
a flexible display panel comprising a display substrate and connecting pads disposed on the display substrate; and
a driving chip, comprising:
a substrate comprising a plurality of supporting bumps disposed thereon;
an input area comprising a plurality of input bumps;
an output area comprising a plurality of output bumps;
an intermediate area; and
wherein the plurality of input bumps comprise at least one set of connecting bumps arranged along a first direction, and the plurality of supporting bumps comprise first supporting bumps that are located between adjacent input bumps arranged along the first direction;
wherein the plurality of output bumps comprise at least one set of connecting bumps arranged along the first direction, and the plurality of supporting bumps comprise first supporting bumps that are located between adjacent output bumps arranged along the first direction;
wherein the plurality of supporting bumps further comprise intermediate area supporting bumps that are regularly disposed within the intermediate area;
wherein a distance between one of the first supporting bumps and its adjacent or neighboring input bump or output bump in the first direction is 30 μm to 40 μm;
wherein the connecting bumps are higher than the first supporting bumps with respect to the substrate, and a size of each of the first supporting bumps is smaller than a size of a neighboring connecting bump;
wherein the connecting bumps are arranged in rows and connecting wirings are arranged in gaps between the rows; and
wherein for connecting bumps in a same row, a first number of first supporting bumps are arranged between two of the connecting bumps in the same row, a second number of first supporting bumps are arranged between another two of the connecting bumps in the same row, the first number is different from the second number; and
wherein the connecting bumps on the driving chip and the connecting pads on the display substrate correspond to each other one to one and are electrically connected to each other.

11. The display device according to claim 10 , wherein each of the connecting pads has a size greater than a size of a corresponding connecting bump.

12. The display device according to claim 10 , wherein the flexible display panel further comprises supporting pads formed on the display substrate and corresponding to the supporting bumps of the driving chip.

Assignees

• Boe Technology Group Co Ltd

Inventors

• Chen Liqiang
• Tsai Paoming
• Li Jianwei
• Bu Dejun
• Du Shuang
• Zheng Can

Classifications

• H10W72/07232

  Compression bonding, e.g. thermocompression bonding · CPC title

• H10W72/263

  Providing mechanical bonding or support, e.g. dummy bumps · CPC title

• H10W72/267

  Multiple bump connectors having different functions · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W72/237

  Multiple bump connectors having different shapes · CPC title