Manufacturing method of sensor chip package structure

Patent metadata

Field	Value
Publication number	US-10964839-B2
Application number	US-202016855702-A
Country	US
Kind code	B2
Filing date	Apr 22, 2020
Priority date	Sep 2, 2015
Publication date	Mar 30, 2021
Grant date	Mar 30, 2021

Abstract

A manufacturing method of a sensor chip package structure is provided. In the manufacturing method, a wafer including a plurality of sensor chips is provided, and each sensor chip has an active region and defines a pre-thinned region thereon. Each pre-thinned region is located at one side of the active region and covers a boundary line of each sensor chip. The pre-thinned region of each sensor chip is etched to form a concave portion. A redistribution layer is formed on the wafer. Subsequently, the wafer is cut to separate the sensor chips from one another, and each separated sensor chip has a wiring layer extending from the active region along a sidewall surface to a bottom surface of the concave portion. The separated sensor chips are respectively mounted on a plurality of substrates, and the active region is electrically connected to the substrate through the wiring layer.

First claim

What is claimed is:

1. A manufacturing method of a sensor chip package structure comprising:
providing a wafer including a plurality of sensor chips, wherein each sensor chip includes an active region and defines at least a pre-thinned region thereon, and the pre-thinned region is located at one side of the active region and covers a boundary line of the sensor chip;
etching the pre-thinned region of each sensor chip to form a concave portion located at one side of the active region;
forming a redistribution layer on the wafer;
performing a cutting process on the wafer to form a plurality of separated sensor chips, wherein each separated sensor chip includes a wiring layer disposed thereon, and at least a portion of the wiring layer extends from the active region along a sidewall surface to a bottom surface of the concave portion; and
disposing each separated sensor chip on a substrate, wherein the active region of each separated sensor chip is electrically connected to the substrate.

2. The manufacturing method of the sensor chip package structure according to claim 1 , further comprising:
forming a dam on each sensor chip, wherein the dam surrounds the active region and defines an enclosed opening.

3. The manufacturing method of the sensor chip package structure according to claim 2 , wherein the step of forming the dam is performed after the step of forming the redistribution layer, and the dam is stacked on a portion of the redistribution layer.

4. The manufacturing method of the sensor chip package structure according to claim 2 , further comprising: forming a molding compound to encapsulate the substrate, the separated sensor chip, and the wiring layer after the step of disposing each separated sensor chip on the substrate.

5. The manufacturing method of the sensor chip package structure according to claim 4 , wherein a top face of the molding compound is coplanar with or lower than an end face of the dam.

6. The manufacturing method of the sensor chip package structure according to claim according to claim 2 , wherein the dam is made of photo-imageable material.

7. The manufacturing method of the sensor chip package structure according to claim according to claim 2 , wherein the dam has a height ranging from 2 to 50 μm and a width ranging from 5 to 100 μm.

8. The manufacturing method of the sensor chip package structure according to claim 1 , further comprising: arranging a light-emitting element in the concave portion, wherein the step of disposing each separated sensor chip on the substrate includes grounding the light-emitting element through the wiring layer.

9. The manufacturing method of the sensor chip package structure according to claim 8 , wherein the step of disposing each separated sensor chip on the substrate includes forming at least a bonding wire so as to establish an electrical connection between the light-emitting element and the substrate.

10. The manufacturing method of the sensor chip package structure according to claim according to claim 8 , wherein the light-emitting element has a thickness less than a depth of the concave portion.

11. The manufacturing method of the sensor chip package structure according to claim according to claim 8 , wherein the step of arranging the light-emitting element is performed before performing the cutting process.

12. The manufacturing method of the sensor chip package structure according to claim according to claim 8 , further comprising: forming a molding compound to encapsulate the substrate, the separated sensor chip, and the wiring layer, and the light-emitting element after the step of disposing each separated sensor chip on the substrate, and the molding compound is made of a material transparent to a light beam emitted by the light-emitting element.

Assignees

• Pixart Imaging Inc

Inventors

• Shen Chi-Chih

Classifications

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W72/5449

  not being orthogonal to a side surface of the chip, e.g. fan-out arrangements · CPC title

• H10W72/221

  Structures or relative sizes · CPC title

• H10W74/141

  the encapsulations being on at least the sidewalls of the semiconductor body · CPC title

• H10W90/28

  the stacked chips having different sizes, e.g. chip stacks having a pyramidal shape · CPC title