Capacitor and capacitor module

Patent metadata

Field	Value
Publication number	US-10964474-B2
Application number	US-202016742095-A
Country	US
Kind code	B2
Filing date	Jan 14, 2020
Priority date	Feb 7, 2019
Publication date	Mar 30, 2021
Grant date	Mar 30, 2021

Abstract

According to one embodiment, a capacitor includes a conductive substrate, a conductive layer, a dielectric layer, and first and second external electrodes. The conductive substrate has a first main surface provided with recess(s), a second main surface, and an end face extending between edges of the first and second main surfaces. The conductive layer covers the first main surface and side walls and bottom surfaces of the recess(s). The dielectric layer is interposed between the conductive substrate and the conductive layer. The first external electrode includes a first electrode portion facing the end face and is electrically connected to the conductive layer. The second external electrode includes a second electrode portion facing the end face and is electrically connected to the conductive substrate.

First claim

The invention claimed is:

1. A capacitor comprising:
a conductive substrate having a first main surface, a second main surface, and an end face extending from an edge of the first main surface to an edge of the second main surface, the first main surface being provided with one or more recesses;
a conductive layer covering the first main surface and side walls and bottom surfaces of the one or more recesses;
a dielectric layer interposed between the conductive substrate and the conductive layer;
a first external electrode including a first electrode portion that faces the end face, the first external electrode being electrically connected to the conductive layer; and
a second external electrode including a second electrode portion that faces the end face, the second external electrode being electrically connected to the conductive substrate,
wherein the one or more recesses are one or more first trenches, one or more second trenches are provided on the second main surface, and the conductive layer further covers the second main surface, and side walls and bottom surfaces of the one or more second trenches.

2. The capacitor according to claim 1 , wherein the end face is provided with first and second grooves each extending from the edge of the first main surface to the edge of the second main surface, and the first and second electrode portions are respectively arranged in the first and second grooves.

3. The capacitor according to claim 2 , wherein the first and second electrode portions respectively have shapes conformal to walls of the first and second grooves.

4. The capacitor according to claim 1 , wherein the first external electrode further includes first and second bonding pads respectively facing the first and second main surfaces, and the second external electrode further includes third and fourth bonding pads respectively facing the first and second main surfaces.

5. The capacitor according to claim 4 , wherein the first bonding pad is connected to one end of the first electrode portion, the second bonding pad is connected to the other end of the first electrode portion, the third bonding pad is connected to one end of the second electrode portion, and the fourth bonding pad is connected to the other end of the second electrode portion.

6. The capacitor according to claim 4 , wherein a relative position of the third bonding pad with respect to the first bonding pad is equal to a relative position of the fourth bonding pad with respect to the second bonding pad.

7. The capacitor according to claim 1 , wherein a length direction of the one or more first trenches and a length direction of the one or more second trenches intersect each other, and the one or more first trenches and the one or more second trenches are connected to each other at intersections thereof.

8. The capacitor according to claim 1 , wherein the conductive substrate includes a substrate and a conductive layer provided on the substrate, and the substrate contains silicon.

9. A capacitor module comprising:
a stacked body including a plurality of capacitors stacked one on top of another, each of the plurality of capacitors being the capacitor according to claim 1 , and two adjacent ones of the plurality of capacitors being such that the first external electrodes are electrically connected to each other and the second external electrodes are electrically connected to each other; and
a circuit substrate supporting the stacked body.

10. A capacitor module comprising:
a stacked body including a plurality of capacitors stacked one on top of another, each of the plurality of capacitors being the capacitor according to claim 1 ;
a circuit substrate supporting the stacked body;
a bonding material provided to be in contact with the first electrode portions of the plurality of capacitors and electrically connecting the first electrode portions together; and
a bonding material provided to be in contact with the second electrode portions of the plurality of capacitors and electrically connecting the second electrode portions together.

11. The capacitor module according to claim 10 , wherein each of the bonding materials is made of solder.

12. A capacitor module comprising:
a stacked body including a plurality of capacitors stacked one on top of another, each of the plurality of capacitors comprising
a conductive substrate having a first main surface, a second main surface, and an end face extending from an edge of the first main surface to an edge of the second main surface, the first main surface being provided with one or more recesses,
a conductive layer covering the first main surface and side walls and bottom surfaces of the one or more recesses,
a dielectric layer interposed between the conductive substrate and the conductive layer,
a first external electrode including a first electrode portion that faces the end face, the first external electrode being electrically connected to the conductive layer, and
a second external electrode including a second electrode portion that faces the end face, the second external electrode being electrically connected to the conductive substrate, and

two adjacent ones of the plurality of capacitors being such that the first external electrodes are electrically connected to each other and the second external electrodes are electrically connected to each other; and
a circuit substrate supporting the stacked body.

13. A capacitor module comprising:
a stacked body including a plurality of capacitors stacked one on top of another, each of the plurality of capacitors comprising
a conductive substrate having a first main surface, a second main surface, and an end face extending from an edge of the first main surface to an edge of the second main surface, the first main surface being provided with one or more recesses,
a conductive layer covering the first main surface and side walls and bottom surfaces of the one or more recesses,
a dielectric layer interposed between the conductive substrate and the conductive layer,
a first external electrode including a first electrode portion that faces the end face, the first external electrode being electrically connected to the conductive layer, and
a second external electrode including a second electrode portion that faces the end face, the second external electrode being electrically connected to the conductive substrate;

a circuit substrate supporting the stacked body;
a bonding material provided to be in contact with the first electrode portions of the plurality of capacitors and electrically connecting the first electrode portions together; and
a bonding material provided to be in contact with the second electrode portions of the plurality of capacitors and electrically connecting the second electrode portions together.

14. The capacitor module according to claim 13 , wherein each of the bonding materials is made of solder.

Assignees

• Toshiba Kk

Inventors

• Matsuo Keiichiro
• Obata Susumu
• Sano Mitsuo
• Higuchi Kazuhito
• Shimokawa Kazuo

Classifications

• H10D1/711

  having non-planar surfaces, e.g. formed by texturisation · CPC title

• H01G4/33 Primary

  Thin- or thick-film capacitors {(thin- or thick-film circuits; capacitors without a potential-jump or surface barrier specially adapted for integrated circuits, details thereof, multistep manufacturing processes therefor)} · CPC title

• H01G4/228

  Terminals · CPC title

• H01G4/06

  Solid dielectrics · CPC title

• H01G4/005 Primary

  Electrodes · CPC title