Display apparatus and method of driving the same

Patent metadata

Field	Value
Publication number	US-10957265-B2
Application number	US-201816012000-A
Country	US
Kind code	B2
Filing date	Jun 19, 2018
Priority date	Jul 28, 2017
Publication date	Mar 23, 2021
Grant date	Mar 23, 2021

Abstract

A display apparatus includes a display panel including display blocks, where each of the display blocks includes a plurality of pixels, a gate driver which outputs gate signals to the pixels, a data driver which receives image data and outputs data voltages corresponding to the image data to the pixels, and a timing controller which converts an image signal input thereto, outputs the converted image signal to the data driver as the image data, and controls a driving timing of the gate driver and the data driver. The timing controller controls output timings of at least data voltages output to pixels of a predetermined display block among the data voltages provided to the pixels of the display blocks, depending on a color pattern of the image signal corresponding to the pixels of the predetermined display block.

First claim

What is claimed is:

1. A display apparatus comprising:
a display panel which comprises a plurality of display blocks, wherein the plurality of display blocks includes an error block and a normal block other than the error block, wherein each of the error block and the normal block includes a plurality of pixels;
a gate driver which outputs gate signals to the pixels;
a data driver which receives image data and outputs data voltages corresponding to the image data to the pixels; and
a timing controller which converts an image signal input thereto, outputs the converted image signal to the data driver as the image data, and controls a driving timing of the gate driver and the data driver,
wherein the timing controller controls output timings of a first data voltage output to the pixels of the error block to have a same output timing as a second data voltage output to the pixels of the normal block, and shifts an output timing of a source output enable signal used to control the output timings of the first data voltage applied to the error block depending on a color pattern of the image signal corresponding to the pixels of the error block in order for the output timing of the first data voltage output to the pixels of the error block to be the same as the output timing of the second data voltage output to the pixels of the normal block, and
wherein the color pattern includes a first color pattern, a second color pattern and a third color pattern, and output timings of the source output enable signal corresponding to the first pattern, the second pattern and the third pattern are different from one another.

2. The display apparatus of claim 1 , wherein the data driver comprises a plurality of source driving chips that receives the image data and outputs the data voltages, and the source driving chips are connected to the display blocks, respectively, and output the data voltages to the pixels.

3. The display apparatus of claim 2 , wherein the timing controller generates a plurality of source output enable signals, outputs the source output enable signals to the source driving chips, respectively, and controls the output timings of the at least data voltages output to the pixels of the predetermined display block.

4. The display apparatus of claim 3 , the source driving chips comprise an error source driving chip connected to the error block and a normal source driving chip connected to the normal block, and the source output enable signals comprise a first source output enable signal output to the error source driving chip and a second source output enable signal output to the normal source driving chip.

5. The display apparatus of claim 4 , wherein the timing controller shifts an output timing of the first source output enable signal such that the output timing of the first source output enable signal is ahead of an output timing of the second source output enable signal.

6. The display apparatus of claim 4 , wherein the color pattern of the image signal comprises:
the first pattern having a first color;
the second pattern having a second color; and
the third pattern having a third color other than the first and second colors.

7. The display apparatus of claim 6 , wherein,
in a case that the color pattern of the image signal is the first pattern, the timing controller shifts an output timing of the first source output enable signal to be ahead of an output timing of the second source output enable signal by a first period,
in a case that the color pattern of the image signal is the second pattern, the timing controller shifts the output timing of the first source output enable signal to be ahead of the output timing of the second source output enable signal by a second period,
in a case that the color pattern of the image signal is the third pattern, the timing controller shifts the output timing of the first source output enable signal to be ahead of the output timing of the second source output enable signal by a third period,
the second period is longer than the first period, and
the third period is longer than the first period and shorter than the second period.

8. The display apparatus of claim 7 , wherein the first period is set to about 10 nanoseconds, the second period is set to about 20 nanoseconds, and the third period is set to about 15 nanoseconds.

9. The display apparatus of claim 7 , further comprising a temperature detector which detects a surrounding temperature of the display panel,
wherein the timing controller shifts the output timing of the first source output enable signal to be ahead of the output timing of the second source output enable signal by an additional period in addition to the first period, the second period, or the third period, in a case that the detected temperature is equal to or higher than a reference temperature.

10. The display apparatus of claim 6 , wherein the first color is a skin color, the second color is a cyan color, and the third color is a color other than the skin color and the cyan color.

11. The display apparatus of claim 6 ,
wherein the image signal comprises red data, green data, and blue data,
each of the data of the image signal has a grayscale value from 0 to 255,
the first pattern comprises the blue data having the grayscale value equal to or smaller than 80, the green data having the grayscale value from 100 to 120, and the red data having the grayscale value of 255,
the second pattern comprises the blue data having the grayscale value of 255, the green data having the grayscale value from 100 to 120, and the red data having the grayscale value equal to or smaller than 80, and
the third pattern comprises the blue data having the grayscale value greater than 80 and smaller than 255, the green data having the grayscale value equal to or greater than 0 and smaller than 100 or the grayscale value greater than 120 and equal to or smaller than 255, and the red data having the grayscale value greater than 80 and smaller than 255.

12. A method of driving a display apparatus, comprising:
receiving an image signal and analyzing a color pattern of the image signal;
converting the received image signal to image data;
generating data voltages corresponding to the image data; and
outputting the data voltages to pixels of a plurality of display blocks,
wherein the plurality of display blocks includes an error block and a normal block other than the error block, each of the error block and the normal block includes a plurality of pixels,
wherein outputting the data voltages to the pixels comprises controlling output timings of a first data voltage output to the pixels of the error block to have a same output timing as a second data voltage output to the pixels of the normal block, and shifts an output timing of a source output enable signal used to control the output timings of the first data voltage applied to the error block depending on the color pattern of the image signal corresponding to the pixels of the error block in order for the output timing of the first data voltage output to the pixels of the error block to be the same as the output timing of the second data voltage output to the pixels of the normal block, and
wherein the color pattern includes a first color pattern, a second color pattern and a third color pattern, and output timings of the source output enable signal corresponding to the first pattern, the second pattern and the third pattern are different from one another.

13. The method of claim 12 , further comprising generating a plurality of source output enable signals and controlling the output timings of the at least data voltages output to the pixels of the prede

Assignees

• Samsung Display Co Ltd

Inventors

• Lee Neung-Beom
• Lee Junpyo
• Kwon Sangan
• Kim Kyunho
• Kim Sungjin
• Shin Yong-Jin
• Yi Shimho
• Lim Kyung-Hwa

Classifications

• G09G3/20 Primary

  for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters} · CPC title

• G09G2310/027

  Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters · CPC title

• G09G3/3688 Primary

  suitable for active matrices only · CPC title

• G09G2310/08

  Details of timing specific for flat panels, other than clock recovery · CPC title

• G09G3/3648

  using an active matrix (G09G3/367 - G09G3/3696 take precedence) · CPC title