Wear-aware block mode conversion in non-volatile memory

Patent metadata

Field	Value
Publication number	US-10956049-B2
Application number	US-201916439122-A
Country	US
Kind code	B2
Filing date	Jun 12, 2019
Priority date	Jun 12, 2019
Publication date	Mar 23, 2021
Grant date	Mar 23, 2021

Abstract

A non-volatile memory includes a plurality of physical blocks of storage each including a respective plurality of cells, where each of the plurality of cells is individually capable of storing multiple bits of data. A controller assigns physical blocks among the plurality of physical blocks to a first pool containing physical blocks operating in a first (e.g., QLC) mode for storing a greater number of bits per cell and assigns other physical blocks among the plurality of physical blocks to a second pool containing physical blocks operating in a second (e.g., SLC) mode for storing a lesser number of bits per cell. The controller transfers physical blocks between the first pool and the second pool based on at least bit error rates measured for the transferred physical blocks.

First claim

What is claimed is:

1. A method of operating a non-volatile memory including a plurality of physical blocks of storage each including a respective plurality of cells, wherein each of the plurality of cells is individually capable of storing multiple bits of data, the method comprising:
a controller assigning physical blocks among the plurality of physical blocks to a first pool containing physical blocks operating in a first mode for storing a greater number of bits per cell and assigning other physical blocks among the plurality of physical blocks to a second pool containing physical blocks operating in a second mode for storing a lesser number of bits per cell;
for each of the first and second pools:
tracking a respective number of physical blocks allocated to store data for each of a plurality of write streams of differing write heats and a respective aggregate number of program/erase (P/E) cycles of the physical blocks assigned to each of the plurality of write streams; and
for each of the plurality of write streams, calculating a respective stream wear metric based on the respective number of physical blocks assigned to the write stream and the aggregate number of P/E cycles of the physical blocks assigned to the write stream; and

the controller transferring physical blocks between the first pool and the second pool, wherein the transferring includes selecting physical blocks for transfer between the first and second pools based on (1) a selected write stream among the plurality of write streams, (2) the stream wear metric of the selected write stream, and (3) block health of physical blocks allocated to store data for the selected write stream.

2. The method of claim 1 , wherein the transferring includes:
transferring, from the first pool to the second pool, physical blocks having a higher bit error rate; and
transferring, from the second pool to the first pool, physical blocks having a lower bit error rate.

3. The method of claim 1 , and further comprising the controller determining block health of physical blocks in all of the plurality of write streams from a bit error rate measured shortly after programming the physical blocks.

4. The method of claim 1 , wherein the selecting includes:
based on the selected write stream having a stream wear metric reflecting a greatest wear among all of the plurality of write streams, selecting, for transfer, healthiest physical blocks from among the physical blocks allocated to the selected write stream; and
based on the selected write stream having a stream wear metric reflecting a least wear among all of the plurality of write streams, selecting, for transfer, least healthy physical blocks from among the physical blocks allocated to the selected write stream.

5. The method of claim 1 , wherein:
the first mode is a quad level cell (QLC) mode; and
the second mode is a single level cell (SLC) mode.

6. The method of claim 1 , wherein the transferring comprises transferring the physical blocks based on an available number of unprogrammed physical blocks from a given one of the first and second pools not satisfying a threshold.

7. A data storage system, comprising:
a controller for a non-volatile memory including a plurality of physical blocks of storage each including a respective plurality of cells, wherein each of the plurality of cells is individually capable of storing multiple bits of data, wherein the controller is configured to perform:
assigning physical blocks among the plurality of physical blocks to a first pool containing physical blocks operating in a first mode for storing a greater number of bits per cell and assigning other physical blocks among the plurality of physical blocks to a second pool containing physical blocks operating in a second mode for storing a lesser number of bits per cell;
for each of the first and second pools:
tracking a respective number of physical blocks allocated to store data for each of a plurality of write streams of differing write heats and a respective aggregate number of program/erase (P/E) cycles of the physical blocks assigned to each of the plurality of write streams; and
for each of the plurality of write streams, calculating a respective stream wear metric based on the respective number of physical blocks assigned to the write stream and the aggregate number of P/E cycles of the physical blocks assigned to the write stream; and

transferring physical blocks between the first pool and the second pool, wherein the transferring includes selecting physical blocks for transfer between the first and second pools based on (1) a selected write stream among the plurality of write streams, (2) the stream wear metric of the selected write stream, and (3) block health of physical blocks allocated to store data for the selected write stream.

8. The data storage system of claim 7 , wherein the transferring includes:
transferring, from the first pool to the second pool, physical blocks having a higher bit error rate; and
transferring, from the second pool to the first pool, physical blocks having a lower bit error rate.

9. The data storage system of claim 7 , wherein the controller is further configured to perform:
determining block health of physical blocks in all of the plurality of write streams from a bit error rate measured shortly after programming the physical blocks.

10. The data storage system of claim 7 , wherein the selecting includes:
based on the selected write stream having a stream wear metric reflecting a greatest wear among all of the plurality of write streams, selecting, for transfer, healthiest physical blocks from among the physical blocks allocated to the selected write stream; and
based on the selected write stream having a stream wear metric reflecting a least wear among all of the plurality of write streams, selecting, for transfer, least healthy physical blocks from among the physical blocks allocated to the selected write stream.

11. The data storage system of claim 7 , wherein:
the first mode is a quad level cell (QLC) mode; and
the second mode is a single level cell (SLC) mode.

12. The data storage system of claim 7 , wherein the transferring comprises transferring the physical blocks based on an available number of unprogrammed physical blocks from a given one of the first and second pools not satisfying a threshold.

13. A computer program product, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions being executable by a controller of a non-volatile memory including a plurality of cells each individually capable of storing multiple bits of data, wherein, when executed, the program instructions cause the controller to perform:
assigning physical blocks among the plurality of physical blocks to a first pool containing physical blocks operating in a first mode for storing a greater number of bits per cell and assigning other physical blocks among the plurality of physical blocks to a second pool containing physical blocks operating in a second mode for storing a lesser number of bits per cell;
for each of the first and second pools:
tracking a respective number of physical blocks allocated to store data for each of a plurality of write streams of differing write heats and a respective aggregate number of program/erase (P/E) cycles of the physical blocks assigned to each of the plurality of write streams; and
for each of the plurality of write streams, calculating a respective stream wear metric based on the respective number of physical blocks assigned to the write stream and the aggregate number of P/E cycles of the physical

Assignees

• IBM

Inventors

• Tomic Sasa
• Pletka Roman Alexander
• Ioannou Nikolas
• Papandreou Nikolaos
• Fry Aaron D
• Fisher Timothy
• Stoica Radu Ioan

Classifications

• G11C2211/5641

  Multilevel memory having cells with different number of storage levels · CPC title

• G11C16/3495 Primary

  Circuits or methods to detect or delay wearout of nonvolatile EPROM or EEPROM memory devices, e.g. by counting numbers of erase or reprogram cycles, by using multiple memory areas serially or cyclically · CPC title

• G06F2212/7211

  Wear leveling · CPC title

• G06F2212/7208

  Multiple device management, e.g. distributing data over multiple flash devices · CPC title

• G06F2212/7205

  Cleaning, compaction, garbage collection, erase control · CPC title