Zener diode voltage reference circuit

Patent metadata

Field	Value
Publication number	US-10955868-B2
Application number	US-201916286758-A
Country	US
Kind code	B2
Filing date	Feb 27, 2019
Priority date	Apr 13, 2018
Publication date	Mar 23, 2021
Grant date	Mar 23, 2021

Abstract

An integrated circuit includes a voltage reference circuit including a Zener diode having a first terminal coupled to a first node and a second terminal coupled to a first voltage supply terminal. A proportional to absolute temperature (PTAT) circuit is coupled at the first node and configured to generate a PTAT current. A PTAT compensation circuit is coupled at the first node. The PTAT compensation circuit includes a first current mirror having a first branch coupled at the first node.

First claim

The invention claimed is:

1. A voltage reference circuit comprising:
a Zener diode having a first terminal coupled to a first node and a second terminal coupled to a first voltage supply terminal (GND);
a proportional to absolute temperature (PTAT) circuit coupled at the first node, the PTAT circuit configured to generate a PTAT current; and
a PTAT compensation circuit coupled at the first node, the PTAT compensation circuit comprising a first current mirror having a first branch coupled at the first node, wherein the first current mirror of the PTAT compensation circuit comprises:
a first transistor having a first current electrode coupled to a second voltage supply terminal (VDD) and a second current electrode coupled to form the first branch at the first node; and
a second transistor having a first current electrode coupled to the second voltage supply terminal and a second current electrode coupled to control electrodes of the first and second transistors, wherein the first current mirror of the PTAT compensation circuit further comprises a second branch coupled to the first current electrode of a third transistor, and the PTAT circuit comprises a second current mirror coupled to a control electrode of the third transistor.

2. The voltage reference circuit of claim 1 , wherein first and second transistors forming the second current mirror are characterized as bipolar junction transistors (BJTs).

3. The voltage reference circuit of claim 1 , further comprising a first resistor having a first terminal coupled at the first node and a second terminal coupled at a second node, the PTAT current establishing a PTAT voltage across the first resistor.

4. The voltage reference circuit of claim 3 , further comprising a voltage divider coupled between the second node and the first voltage supply terminal, the voltage divider configured to provide a reference voltage at an output terminal.

5. The voltage reference circuit of claim 4 , the voltage divider comprising:
a second resistor having a first terminal coupled at the second node and a second terminal coupled at an output terminal; and
a third resistor having a first terminal coupled to the output terminal and a second terminal coupled to the first voltage supply terminal.

6. The voltage reference circuit of claim 5 , wherein the output terminal is coupled to an input terminal of an analog-to-digital converter.

7. The voltage reference circuit of claim 1 , wherein the first terminal of the Zener diode is characterized as a cathode and the second terminal of the Zener diode is characterized as an anode.

8. The voltage reference circuit of claim 1 , wherein the first current mirror of the PTAT compensation circuit further comprises:
a third transistor having a first current electrode coupled to the second current electrode of the second transistor, a control electrode coupled to the PTAT circuit, and a second current electrode coupled to the first voltage supply terminal.

9. The voltage reference circuit of claim 1 , further comprising a current source having an input coupled to the second voltage supply terminal and an output coupled at the first node.

10. A method of generating a reference voltage, the method comprising:
providing a Zener diode coupled between a first node and a first voltage supply terminal;
generating a proportional to absolute temperature (PTAT) current by way of a PTAT circuit coupled at the first node, the PTAT current establishing a PTAT voltage across a first resistor coupled at the first node; and
injecting a PTAT compensation current at the first node by way of a PTAT compensation circuit coupled at the first node, the PTAT compensation circuit comprising:
a first transistor having a first current electrode coupled to a second voltage supply terminal and a second current electrode coupled at the first node; and
a second transistor having a first current electrode coupled to the second voltage supply terminal and a second current electrode coupled to control electrodes of the first and second transistors; and
a third transistor having a first current electrode coupled to the second current electrode of the second transistor, a control electrode coupled to the PTAT circuit, and a second current electrode coupled to the first voltage supply terminal.

11. The method of claim 10 , wherein the PTAT compensation current is based on a mirrored current through the third transistor.

12. The method of claim 10 , further comprising generating the reference voltage at an output of a voltage divider coupled to the PTAT circuit.

13. A semiconductor device comprising:
a Zener diode-coupled between a first node- and a first voltage supply terminal;
a PTAT circuit coupled at the first node, the PTAT current establishing a PTAT voltage across a first resistor coupled at the first node to generate a proportional to absolute temperature (PTAT) current; and
a PTAT compensation circuit coupled at the first node to inject a PTAT compensation current at the first node, the PTAT compensation circuit comprising:
a first transistor having a first current electrode coupled to a second voltage supply terminal and a second current electrode coupled at the first node; and
a second transistor having a first current electrode coupled to the second voltage supply terminal and a second current electrode coupled to control electrodes of the first and second transistors; and
a third transistor having a first current electrode coupled to the second current electrode of the second transistor, a control electrode coupled to the PTAT circuit, and a second current electrode coupled to the first voltage supply terminal.

14. The semiconductor device of claim 13 , wherein the PTAT compensation current is based on a mirrored current through the third transistor.

15. The semiconductor device of claim 13 , wherein the reference voltage is generated at an output of a voltage divider coupled to the PTAT circuit.

16. The semiconductor device of claim 13 , the first resistor having a first terminal coupled at the first node and a second terminal coupled at a second node, the PTAT current establishing a PTAT voltage across the first resistor.

17. The semiconductor device of claim 16 , further comprising a voltage divider coupled between the second node and the first voltage supply terminal, the voltage divider configured to provide a reference voltage at an output terminal.

Assignees

• Nxp Usa Inc

Inventors

• Brule Simon

Classifications

• G05F3/30

  Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities (G05F3/26 takes precedence) · CPC title

• G05F3/18 Primary

  using Zener diodes · CPC title

• G05F3/185 Primary

  and field-effect transistors · CPC title

• G05F3/267

  using both bipolar and field-effect technology · CPC title

• G05F3/26

  Current mirrors · CPC title