SiC epitaxial wafer, method for manufacturing SiC epitaxial wafer, SiC device, and power conversion apparatus

Patent metadata

Field	Value
Publication number	US-10950435-B2
Application number	US-201716474161-A
Country	US
Kind code	B2
Filing date	Apr 6, 2017
Priority date	Apr 6, 2017
Publication date	Mar 16, 2021
Grant date	Mar 16, 2021

Abstract

A SiC substrate (1) has an off angle θ°. A SiC epitaxial layer (2) having a film thickness of Tm μm is provided on the SiC substrate (1). Triangular defects (3) are formed on a surface of the SiC epitaxial layer (2). A density of triangular defects (3) having a length of Tm/Tan θ×0.9 or more in a substrate off direction is denoted by A. A density of triangular (3) defects having a length smaller than Tm/Tan θ×0.9 in the substrate off direction is denoted by B. B/A≤0.5 is satisfied.

First claim

The invention claimed is:

1. A SiC epitaxial wafer comprising:
a SiC substrate having an off angle θ°; and
a SiC epitaxial layer provided on the SiC substrate and having a film thickness of Tm μm, wherein
triangular defects are formed on a surface of the SiC epitaxial layer,
a density of triangular defects having a length of Tm/Tanθ×0.9 or more in a substrate off direction is denoted by A,
a density of triangular defects having a length shorter than Tm/Tanθ×0.9 in the substrate off direction is denoted by B, and
B/A≤0.5 is satisfied.

2. The SiC epitaxial wafer according to claim 1 , wherein
the density B of the triangular defects is 0.5/cm 2 or less.

3. The SiC epitaxial wafer according to claim 1 , wherein
the film thickness Tm of the SiC epitaxial layer is 30 μm or more.

4. The SiC epitaxial wafer according to claim 1 , wherein
a density of triangular defects shorter than Tm/Tanθ×0.5 is denoted by C, and C/A≤0.2 is satisfied.

5. The SiC epitaxial wafer according to claim 1 , wherein
the SiC epitaxial layer includes two or more layers.

6. A method for manufacturing the SiC epitaxial wafer according to claim 1 , comprising:
placing the SiC substrate on a wafer holder and accommodating the SiC substrate placed on the wafer holder in a susceptor; and
supplying a source gas to grow the SiC epitaxial layer on the SiC substrate.

7. The method for manufacturing the SiC epitaxial wafer according to claim 6 , wherein
a temperature of the susceptor at a portion directly above the SiC substrate is higher than a temperature of the susceptor other than the portion.

8. The method for manufacturing the SiC epitaxial wafer according to claim 6 , wherein
a gas flow between a ceiling of the susceptor and the SiC substrate is separated into a plurality of layers, a gas flowing on the ceiling of the susceptor side is a carrier gas and has higher flow velocity than that of a gas flowing on the SiC substrate side.

9. The method for manufacturing the SiC epitaxial wafer according to claim 6 , wherein
the susceptor or the wafer holder has a SiC coat deposited on a surface of a base material,
C/Si ratio of the SiC coat increases as a film thickness of the SiC increases, and
C/Si ratio of an outermost surface of the SiC coat is same as C/Si ratio of the SiC epitaxial layer.

10. The method for manufacturing the SiC epitaxial wafer according to claim 6 , wherein
a surface of the susceptor or the wafer holder has unevenness.

11. A SiC device using the SiC epitaxial wafer according to claim 1 .

12. A power conversion apparatus comprising:
a main conversion circuit including the SiC device according to claim 11 , converting input power and outputting converted power; and
a control circuit outputting a control signal for controlling the main conversion circuit to the main conversion circuit.

13. The SiC epitaxial wafer according to claim 1 , wherein
the triangular defects are formed on the surface of the SiC epitaxial layer via at least one of in-furnace foreign matter, atom nucleation, polishing damage of a surface of the SiC epitaxial wafer, and two-dimensional nuclei formed during epitaxial growth.

Assignees

• Mitsubishi Electric Corp

Inventors

• Hamano Kenichi
• Ohno Akihito
• Mizobe Takuma
• Kimura Yasuhiro
• Mitani Yoichiro

Classifications

• H10P14/20

  of semiconductor materials · CPC title

• H10D62/10

  Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies · CPC title

• H10P14/3408 Primary

  Silicon carbide · CPC title

• H10P14/24

  using chemical vapour deposition [CVD] · CPC title

• H10P14/2926

  Crystal orientations · CPC title