Non-linear converter to linearize the non-linear output of measurement devices

Patent metadata

Field	Value
Publication number	US-10931297-B2
Application number	US-201916586637-A
Country	US
Kind code	B2
Filing date	Sep 27, 2019
Priority date	Jan 15, 2016
Publication date	Feb 23, 2021
Grant date	Feb 23, 2021

Abstract

A non-linear converter comprising a non-linear voltage divider having a plurality of resistors representing a non-linear transfer function, an analog multiplexer having analog multiplexer inputs coupled to the non-linear voltage divider and configured to output an analog multiplexer output, the analog multiplexer chooses one of the plurality of resistors based on a logic signal and the non-linear transfer function, an analog comparator having an analog comparator first input configured to receive an analog input voltage, an analog comparator second input configured to receive the analog multiplexer output and the analog comparator configured to output a comparator voltage output and a logic loop coupled to the analog comparator and configured to receive the comparator voltage output and configured to output the logic signal, wherein the logic signal represents a linearized digital word.

First claim

What is claimed is:

1. A non-linear converter comprising:
a non-linear voltage divider having a plurality of resistors defining a first non-linear transfer function;
an analog comparator having:
an analog comparator first input configured to receive an analog input voltage;
an analog comparator second input coupled with an output of the non-linear voltage divider, and
an analog comparator output coupled with an input of the non-linear voltage divider;

at least one lower bit extension resistor coupled to a lower end of the non-linear voltage divider;
at least one lower bit extension transistor coupled in parallel with the at least one lower bit extension resistor, wherein at least one lower bit extension transistor gate is configured to receive at least one extension bit input;
at least one upper bit extension resistor coupled to an upper end of said non-linear voltage divider; and
at least one upper bit extension transistor coupled in parallel with the at least one upper bit extension resistor, wherein at least one upper bit extension transistor gate is configured to receive at least one complementary extension bit input.

2. The non-linear converter of claim 1 , further comprising a multiplexer selectively coupling one of two or more outputs of the non-linear voltage divider to the analog comparator second input.

3. The non-linear converter of claim 2 , further comprising a logic loop coupling the analog comparator output to the input of the non-linear voltage divider, wherein:
the logic loop is configured to output a logic signal, and
the non-linear divider is configured to receive the logic signal at the input of the non-linear divider.

4. The non-linear converter of claim 3 , wherein the analog input voltage comes from a sensor having a second non-linear transfer function.

5. The non-linear converter of claim 4 , wherein the first non-linear transfer function is defined to compensate for the second non-linear transfer function, thus linearizing the logic signal.

6. The non-linear converter of claim 3 , wherein the non-linear voltage divider is configured to receive a voltage reference high input and the non-linear voltage divider is configured to receive a voltage reference low input.

7. The non-linear converter of claim 3 , wherein the non-linear voltage divider comprises p-doped poly resistors.

8. The non-linear converter of claim 1 , wherein the first non-linear transfer function comprises one or more non-linear transfer functions being in correspondence with one or more states of the at least one lower bit extension transistor and the at least one upper bit extension transistor.

9. The non-linear converter of claim 4 , wherein the sensor comprises at least one of a diode, silicon bandgap temperature sensor, a resistance thermometer, a thermocouple, a thermistor and a thermopile.

10. The non-linear converter of claim 4 , wherein the sensor comprises a pressure sensor.

11. The non-linear converter of claim 4 , wherein the sensor comprises an irradiance sensor.

12. The non-linear converter of claim 4 , wherein the sensor comprises at least one of a piezo-resistive sensor, a capacitive sensor, an inductive sensor, a hall effect sensor, an eddy current sensor, a piezoelectric sensor, an optical sensor and a potentiometric sensor.

13. The non-linear converter of claim 4 , wherein the sensor comprises at least one of a current sensor, a voltage sensor and a power sensor.

14. The non-linear converter of claim 1 , wherein the at least one lower bit extension resistor and the at least one upper bit extension resistor have similar resistivities.

15. The non-linear converter of claim 1 , wherein first extension bit input and the first complementary extension bit input have opposing signal levels.

16. A method of linearizing non-linear voltage response outputs in a analog to digital converter comprising:
receiving a non-linear voltage response indicative of a measured quantity;
using successive approximation to generate a digital word based on the non-linear voltage; and
linearizing the digital word by matching the non-linear voltage response indicative of the measured quantity to a non-linear converter.

17. The method of linearizing non-linear voltage response outputs of claim 16 , wherein the matching non-linear voltage response is provided by a non-linear voltage divider having a plurality of resistors representing a non-linear transfer function in the non-linear converter.

18. The method of linearizing non-linear voltage response outputs of claim 16 , wherein a number of bits is extended by
receiving a first signal to perform one of opening and shorting a bottom switch in parallel with a bottom resistor at a low voltage;
receiving a second signal to perform one of opening and shorting of a top switch in parallel with a top resistor at a high voltage; and
extending the number of bits of a digital analog converter based on the states of the bottom switch and top switch.

Assignees

• Psemi Corp

Inventors

• Englekirk Robert Mark

Classifications

• G01K7/01

  using semiconducting elements having PN junctions (G01K7/02, G01K7/16, G01K7/30 take precedence) · CPC title

• G01K15/005

  Calibration · CPC title

• H03M1/464 Primary

  Non-linear conversion · CPC title

• G01K2219/00

  Thermometers with dedicated analog to digital converters · CPC title

• G01K7/25

  for modifying the output characteristic, e.g. linearising · CPC title