Wafer structure with mode suppression

Patent metadata

Field	Value
Publication number	US-10930742-B2
Application number	US-202016821559-A
Country	US
Kind code	B2
Filing date	Mar 17, 2020
Priority date	Nov 30, 2017
Publication date	Feb 23, 2021
Grant date	Feb 23, 2021

Abstract

A reconstituted wafer includes a plurality of apertures defined in a first substrate. A module is positioned in each aperture and coupled to circuit traces on the first substrate by operation of beam leads extending from the module. A second substrate is positioned over the first substrate and each module is enclosed in a space defined by the respective aperture and the second substrate. The module includes a lid and at least one mode suppression circuit disposed in the lid. The modules may include an invariant die where different technologies are stacked together.

First claim

What is claimed is:

1. A wafer structure comprising:
a first planar structure having a plurality of apertures defined therein;
at least one module positioned with respect to one of the apertures of the plurality of apertures, the at least one module having a plurality of beam leads coupled to the first planar structure; and
a second planar structure disposed on a first surface of the first planar structure to define a closed space about the at least one module,
wherein the at least one module comprises:
a first circuit layer;
a second circuit layer coupled to the first circuit layer;
a lid; and
at least one mode suppression circuit, configured to provide passive mode suppression, disposed in the lid, the at least one mode suppression circuit comprising at least one cavity and a plurality of passive elements configured to form a passive electronic band gap surface, each passive element comprising a cell structure,
wherein the cell structure comprises:
a top layer comprising an electrically conductive pad;
a middle layer comprising a plurality of electrically resistive pads;
a lower layer comprising electrically conductive material; and
a via electrically coupling the top layer electrically conductive pad to

the lower layer electrically conductive material, and
wherein at least one of the first and second circuit layers is coupled to at least one beam lead of the plurality of beam leads.

2. The wafer structure of claim 1 , wherein each electrically conductive pad comprises Au.

3. The wafer structure of claim 1 , wherein each electrically resistive pad comprises NiCr.

4. The wafer structure of claim 1 , wherein the electrically conductive material comprises Au.

5. A device, comprising:
a first planar structure having a first surface;
a first aperture defined in the first surface of the first planar structure;
a first module having a plurality of co-planar leads extending therefrom, wherein the plurality of co-planar leads is coupled to the first surface of the first planar structure to position the first module in the first aperture;
a second planar structure disposed on the first surface of the first planar structure,
wherein a closed space is defined about the first module by the first and second planar structures and the first aperture,
wherein the first module comprises:
a lid; and
at least one mode suppression circuit, configured to provide passive mode suppression, disposed in the lid, the at least one mode suppression circuit comprising at least one cavity and a plurality of passive elements configured to form a passive electronic band gap surface, each passive element comprising a cell structure, and
wherein the cell structure comprises:
a top layer comprising an electrically conductive pad;
a middle layer comprising a plurality of electrically resistive pads;
a lower layer comprising electrically conductive material; and
a via electrically coupling the top layer electrically conductive pad to the lower layer electrically conductive material.

6. The device of claim 5 , wherein each electrically conductive pad comprises Au.

7. The device of claim 5 , wherein each electrically resistive pad comprises NiCr.

8. The device of claim 5 , wherein the electrically conductive material comprises Au.

Assignees

• Raytheon Co

Inventors

• Kazemi Hooman
• Rosker Mark
• Kazior Thomas E
• O'Connor Shane A
• Elswick Emily

Classifications

• H10W74/40

  characterised by their materials · CPC title

• H10W72/60

  Strap connectors, e.g. thick copper clips for grounding of power devices · CPC title

• H10W70/635

  Through-vias · CPC title

• H10W70/611

  for connecting multiple chips together · CPC title

• H10W42/20

  protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons · CPC title