Display apparatus including a micro light-emitting diode

US10930626B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10930626-B2
Application numberUS-201715407006-A
CountryUS
Kind codeB2
Filing dateJan 16, 2017
Priority dateFeb 22, 2016
Publication dateFeb 23, 2021
Grant dateFeb 23, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display apparatus includes a semiconductor substrate, a transistor, and a light-emitting diode. The transistor is disposed on the semiconductor substrate and uses a portion of the semiconductor substrate as an active layer thereof. The light-emitting diode is disposed on the semiconductor substrate and is electrically connected to the transistor.

First claim

Opening claim text (preview).

What is claimed is: 1. A display apparatus comprising: a semiconductor substrate; a transistor disposed on the semiconductor substrate and using a portion of the semiconductor substrate as an active layer thereof, wherein the active layer of the semiconductor substrate includes a source region, a drain region, and a channel region disposed between the source region and the drain region; a light-emitting diode disposed on the semiconductor substrate and electrically connected to the transistor, the light-emitting diode including a p-n diode; an insulating substrate disposed below the semiconductor substrate, wherein the insulating substrate is closer to the transistor than to the light-emitting diode, and is disposed apart from the semiconductor substrate; a conductive line disposed on the insulating substrate and configured to provide an electrical signal to the transistor; a first conductive bump disposed between the semiconductor substrate and the conductive line and electrically connecting the conductive line to the transistor, wherein the first conductive bump separates the insulating substrate from the semiconductor substrate; and a passivation layer surrounding a side portion of the semiconductor substrate and a side portion of the light-emitting diode, and contacting the first conductive bump, wherein the side portion of the semiconductor substrate and the side portion of the light-emitting diode do not face each other, and wherein the p-n diode and the semiconductor substrate are equal in width and are aligned in a cross-sectional view. 2. The display apparatus of claim 1 , wherein the semiconductor substrate comprises silicon. 3. The display apparatus of claim 2 , wherein the semiconductor substrate is monocrystalline. 4. The display apparatus of claim 1 , wherein the light-emitting diode is spaced apart from the transistor, and the semiconductor substrate is disposed between the light-emitting diode and the transistor. 5. The display apparatus of claim 1 , wherein the light-emitting diode is electrically connected to the transistor through a conductive via penetrating the semiconductor substrate. 6. The display apparatus of claim 5 , further comprising a second conductive bump disposed between the light-emitting diode and the semiconductor substrate and electrically connecting the light-emitting diode to the transistor. 7. The display apparatus of claim 1 , wherein the insulating substrate comprises a flexible substrate. 8. The display apparatus of claim 1 , wherein a surface area of the light-emitting diode is substantially equal to a surface area of the semiconductor substrate. 9. A display apparatus comprising: an insulating substrate; a first pixel disposed on the insulating substrate; and a second pixel disposed on the insulating substrate and spaced apart from the first pixel, wherein each of the first and second pixels comprises a semiconductor substrate, a light-emitting diode including a first electrode and a second electrode, a passivation layer on the light-emitting diode, and a transistor electrically connected to the first electrode, the passivation layer of the first pixel has an opening which overlaps the light-emitting diode of the first pixel, the passivation layer of the second pixel has an opening which overlaps the light-emitting diode of the second pixel, the second electrode of the light-emitting diode of the first pixel and the second electrode of the light-emitting diode of the second pixel are electrically connected via an electrode common to the first and second pixels, the electrode common to the first and second pixels is disposed over the opening of the passivation layer of the first pixel and the opening of the passivation layer of the second pixel, and the electrode common to the first and second pixels includes a transparent or semi-transparent electrode. 10. The display apparatus of claim 9 , wherein the first pixel or the second pixel comprises a transistor that uses a portion of the semiconductor substrate as an active layer thereof and is configured to drive either the light-emitting diode of the first pixel or the light-emitting diode of the second pixel. 11. The display apparatus of claim 10 , wherein the transistor is spaced apart from the light-emitting diode, and the semiconductor substrate is disposed between the transistor and the light-emitting diode. 12. The display apparatus of claim 9 , wherein the first pixel emits light of a first wavelength, and the second pixel emits light of a second wavelength different from the first wavelength. 13. The display apparatus of claim 9 , wherein the semiconductor substrate is monocrystalline. 14. The display apparatus of claim 9 , further comprising a conductive line disposed between the insulating substrate and the semiconductor substrate and configured to provide an electrical signal to at least one of the first and second pixels. 15. The display apparatus of claim 9 , wherein the insulating substrate comprises a flexible substrate. 16. A display apparatus comprising: a semiconductor substrate; a transistor disposed on the semiconductor substrate and using a portion of the semiconductor substrate as an active layer thereof, wherein the active layer of the semiconductor substrate includes a source region, a drain region, and a channel region disposed between the source region and the drain region; a light-emitting diode disposed on the semiconductor substrate and electrically connected to the transistor, the light-emitting diode including a p-n diode; an insulating substrate disposed below the semiconductor substrate, wherein the insulating substrate is closer to the transistor than to the light-emitting diode, and is disposed apart from the semiconductor substrate; a conductive line disposed on the insulating substrate and configured to provide an electrical signal to the transistor; a plurality of first conductive bumps disposed between the semiconductor substrate and the conductive line and electrically connecting the conductive line to the transistor, wherein the first conductive bumps separate the insulating substrate from the semiconductor substrate; and a passivation layer surrounding a side portion of the semiconductor substrate and a side portion of the light-emitting diode, and contacting the first conductive bump, wherein the side portion of the semiconductor substrate and the side portion of the light-emitting diode do not face each other, and wherein the p-n diode and the semiconductor substrate are equal in width and are alined in a cross-sectional view.

Assignees

Inventors

Classifications

  • between stacked chips · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • between stacked chips · CPC title

  • changes in dispositions · CPC title

  • Bump connectors and die-attach connectors · CPC title

Patent family

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Frequently asked questions

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What does patent US10930626B2 cover?
A display apparatus includes a semiconductor substrate, a transistor, and a light-emitting diode. The transistor is disposed on the semiconductor substrate and uses a portion of the semiconductor substrate as an active layer thereof. The light-emitting diode is disposed on the semiconductor substrate and is electrically connected to the transistor.
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W90/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 23 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).