Wet etching of samarium selenium for piezoelectric processing

Patent metadata

Field	Value
Publication number	US-10930519-B2
Application number	US-201916272331-A
Country	US
Kind code	B2
Filing date	Feb 11, 2019
Priority date	Jan 13, 2017
Publication date	Feb 23, 2021
Grant date	Feb 23, 2021

Abstract

A subtractive forming method for piezoresistive material stacks includes applying an etch chemistry to an exposed first portion of a piezoresistive material stack. The etch chemistry includes a citric acid component for removing a first element of a piezoelectric layer of the piezoresistive material stack selectively to a surface oxide. At least one second element of the piezoelectric layer remains. The method further includes heating the piezoresistive material stack after said applying the etch chemistry to vaporize the at least one second element. A second portion of the piezoresistive material stack is protected from the removal and the heating by a mask.

First claim

What is claimed is:

1. A subtractive forming method for piezoresistive material stacks comprising:
applying an etch chemistry to an exposed first portion of a piezoresistive material stack, the etch chemistry including a citric acid component for removing a first element of a piezoelectric layer of the piezoresistive material stack selectively to a surface oxide, wherein at least one second element of the piezoelectric layer remains; and
heating the piezoresistive material stack after said applying the etch chemistry to vaporize the at least one second element, a second portion of the piezoresistive material stack being protected from the removal and the heating by a mask.

2. The method of claim 1 , further comprising forming the mask on the second portion of the piezoresistive material stack.

3. The method of claim 1 , wherein the piezoresistive material stack further includes a metal layer including a metal component selected from the group consisting of: aluminum (Al), chromium (Cr), titanium (Ti), and silicon (Si), and combinations thereof.

4. The method of claim 1 , wherein the first element of the piezoelectric layer is samarium (Sm).

5. The method of claim 1 , wherein the at least one second element of the piezoelectric layer includes a material having high vapor pressure at moderate temperatures.

6. The method of claim 5 , wherein the at least one second element of the piezoelectric layer is selected from the group consisting of: selenium (Se), sulfur (S), and tellurium (Te) and combinations thereof.

7. The method of claim 1 , wherein the etch chemistry further includes a hydrogen peroxide component for forming the surface oxide on a metal component of the piezoresistive material stack.

8. The method of claim 7 , wherein the etch chemistry includes hydrogen peroxide present in an aqueous solution in an amount ranging from 1 wt/wt % to 20 wt/wt %, and citric acid present in the aqueous solution in an amount ranging from 1 wt/wt % to 20 wt/wt %.

9. The method of claim 1 , wherein heating the piezoresistive material stack includes heating the piezoresistive material stack in a furnace at a temperature greater than 100° C. for a time period greater than 5 minutes.

10. A subtractive forming method for piezoresistive material stacks comprising:
applying an etch chemistry to an exposed first portion of a piezoresistive material stack, the etch chemistry including a citric acid component for removing samarium (Sm) from a piezoelectric layer of the piezoresistive material stack selectively to a surface oxide, wherein at least one second element of the piezoelectric layer remains; and
heating the piezoresistive material stack after said applying the etch chemistry to vaporize the at least one second element, a second portion of the piezoresistive material stack being protected from the removal and the heating by a mask.

11. The method of claim 10 , further comprising forming the mask on the second portion of the piezoresistive material stack.

12. The method of claim 10 , wherein the piezoresistive material stack further includes a metal layer including a metal component selected from the group consisting of: aluminum (Al), chromium (Cr), titanium (Ti), and silicon (Si), and combinations thereof.

13. The method of claim 10 , wherein the at least one second element of the piezoelectric layer includes a material having high vapor pressure at moderate temperatures.

14. The method of claim 13 , wherein the at least one second element of the piezoelectric layer is selected from the group consisting of: selenium (Se), sulfur (S), and tellurium (Te) and combinations thereof.

15. The method of claim 10 , wherein the etch chemistry further includes a hydrogen peroxide component for forming the surface oxide on a metal component of the piezoresistive material stack.

16. The method of claim 15 , wherein the etch chemistry includes hydrogen peroxide present in an aqueous solution in an amount ranging from 1 wt/wt % to 20 wt/wt %, and the etch chemistry includes citric acid present in the aqueous solution in an amount ranging from 1 wt/wt % to 20 wt/wt %.

17. The method of claim 10 , wherein heating the piezoresistive material stack includes heating the piezoresistive material stack in a furnace at a temperature greater than 100° C. for a time period greater than 5 minutes.

18. A subtractive forming method for piezoresistive material stacks comprising:
masking a piezoresistive material stack to expose a first portion of the piezoresistive material stack and form a mask on a second portion of the piezoresistive material stack;
applying an etch chemistry to the exposed first portion of the piezoresistive material stack, the etch chemistry including citric acid and hydrogen peroxide that is selective to an upper electrode layer of the piezoelectric material stack, wherein the hydrogen peroxide reacts with the upper electrode layer to provide an etch protectant surface on the upper electrode layer, and the citric acid etches a first element of a piezoelectric layer of the piezoelectric material stack selectively to the etch protectant surface leaving a residue of at least one second element of the piezoelectric layer on a dielectric layer of the piezoelectric material stack; and
removing the residue of the at least one second element by elevating a temperature of the at least one second element above a heat of vaporization for the at least one second element, wherein the second portion of the piezoresistive material stack is protected from the removal and the heating by the mask.

19. The method of claim 18 , wherein:
the piezoresistive material stack further includes a lower electrode layer having a first portion and a second portion:
the piezoelectric layer has a first portion and a second portion;
the dielectric layer separates the first portion of the lower electrode layer from the first portion of the piezoelectric layer;
the second portion of the lower electrode layer is in contact with the first portion of the piezoelectric layer; and
the upper electrode layer is in direct contact with a surface the piezoelectric layer that is opposite the surface of the piezoelectric layer that is in contact with the dielectric layer.

20. The method of claim 18 , further comprising patterning the upper electrode layer prior to etching the piezoelectric layer.

Assignees

• IBM

Inventors

• Armstrong Christine
• Copel Matthew W
• Luo Yu
• Solomon Paul M

Classifications

• H10P14/3431

  Selenides · CPC title

• H10P14/24

  using chemical vapour deposition [CVD] · CPC title

• H10P50/667 Primary

  by liquid etching only · CPC title

• H01L21/0256

  Electricity · mapped topic

• H01L41/332

  Electricity · mapped topic