Three dimensional memory array with select device

Patent metadata

Field	Value
Publication number	US-10916586-B2
Application number	US-201816124254-A
Country	US
Kind code	B2
Filing date	Sep 7, 2018
Priority date	Jun 11, 2013
Publication date	Feb 9, 2021
Grant date	Feb 9, 2021

Abstract

Three dimensional memory arrays and methods of forming the same are provided. An example three dimensional memory array can include a stack comprising a plurality of first conductive lines separated from one another by at least an insulation material, and at least one conductive extension arranged to extend substantially perpendicular to the plurality of first conductive lines such that the at least one conductive extension intersects each of the plurality of first conductive lines. Storage element material is arranged around the at least one conductive extension, and a select device is arranged around the storage element material. The storage element material is radially adjacent an insulation material separating the plurality of first conductive lines, and the plurality of materials arranged around the storage element material are radially adjacent each of the plurality of first conductive lines.

First claim

What is claimed is:

1. An apparatus, comprising:
a select device including an inner concentric conductor material in physical contact with a storage element material, a conductive extension, and an outer concentric non-metallic material arranged around the inner concentric conductor material such that the outer concentric non-metallic material is in physical contact with the inner concentric conductor material, wherein:
the select device is arranged annularly around the storage element material; and
the outer concentric non-metallic material is in physical contact with a first surface, a second surface, and a third surface of the inner concentric conductor material.

2. The apparatus of claim 1 , wherein a plurality of materials comprising the select device are radially adjacent each of a plurality of first conductive lines of the apparatus.

3. The apparatus of claim 1 , wherein the outer concentric non-metallic material includes a semiconductor material.

4. The apparatus of claim 1 , wherein the outer concentric non-metallic material includes an insulator material.

5. The apparatus of claim 1 , wherein the select device is a metal-insulator-metal select device, a metal-semiconductor-metal select device, or an ovonic threshold switch.

6. The apparatus of claim 1 , wherein the outer concentric non-metallic material includes a lamellar stack that includes alternating semiconductor and insulator materials.

7. An apparatus, comprising:
a select device including an inner concentric conductor material in physical contact with storage element material, a conductive extension, and an outer concentric non-metallic material in physical contact with at least two surfaces of the inner concentric conductor material, wherein a plurality of materials comprising the select device are radially adjacent to the storage element material.

8. The apparatus of claim 7 , the select device includes a non-metallic material at an outside diameter of a ring geometry and a conductor material at an inside diameter of the ring geometry and in physical contact with the storage element material at two discrete locations.

9. The apparatus of claim 7 , further comprising a buffer material concentrically disposed between the select device and the storage element material.

10. The apparatus of claim 7 , wherein the storage element material, conductor material, and semiconductor material are concentrically arranged around a conductive extension.

11. The apparatus of claim 7 , wherein the conductor material is arranged between the outer concentric non-metallic material and the conductive extension.

12. The apparatus of claim 7 , wherein the select device and the storage element material are included in a three-dimensional memory array.

13. The apparatus of claim 7 , wherein first instances of the conductor material and the semiconductor material are isolated from second instances of the conductor material and the semiconductor material by an insulation material.

14. A system, comprising:
a three-dimensional memory array including a stack of alternating conductive lines and insulation materials; and
a plurality of discrete select devices, the plurality of discrete select devices each having a ring geometry, a respective one of the plurality of discrete select devices being located adjacent a respective conductive line, where:
each of the plurality of discrete select devices includes a non-metallic material at an outside diameter of the ring geometry and a conductor material at an inside diameter of the ring geometry and in physical contact with a storage element material; and
the non-metallic material is disposed on at least a first surface, a second surface, and a third surface of the conductor material.

15. The system of claim 14 , wherein each of the plurality of discrete select devices are in physical contact with the storage element material at two discrete locations.

16. The system of claim 14 , wherein the conductive lines and the conductor material at the inside diameter of the ring geometry comprise a same metal material.

17. The system of claim 14 , wherein the non-metallic material at the outside diameter of the ring geometry comprises a semiconductor material, a dielectric material, or combinations thereof.

18. The system of claim 14 , wherein a plurality of materials comprising the plurality of discrete select devices are radially adjacent each of a plurality of first conductive lines of the three-dimensional memory array.

19. An apparatus, comprising:
a select device including an inner concentric conductor material in physical contact with a storage element material, a conductive extension, and an outer concentric non-metallic material arranged around the inner concentric conductor material such that the outer concentric non-metallic material is in physical contact with the inner concentric conductor material, wherein the outer concentric non-metallic material includes a lamellar stack that includes alternating semiconductor and insulator materials.

Assignees

• Micron Technology Inc

Inventors

• Ramaswamy D V Nirmal
• Sills Scott E
• Sandhu Gurtej S

Classifications

• H10B63/24

  of the Ovonic threshold switching type · CPC title

• H10B63/845 Primary

  the switching components being connected to a common vertical conductor · CPC title

• H10N70/24

  based on migration or redistribution of ionic species, e.g. anions, vacancies · CPC title

• H10B63/22 Primary

  of the metal-insulator-metal type · CPC title

• H10B63/20

  comprising selection components having two electrodes, e.g. diodes · CPC title