Semiconductor device and method for manufacturing the same

Patent metadata

Field	Value
Publication number	US-10916430-B2
Application number	US-201715654110-A
Country	US
Kind code	B2
Filing date	Jul 19, 2017
Priority date	Jul 25, 2016
Publication date	Feb 9, 2021
Grant date	Feb 9, 2021

Abstract

A semiconductor device with favorable electrical characteristics is provided. A source electrode and a drain electrode of a channel-etched transistor are each made to have a stacked-layer structure including a first conductive layer and a second conductive layer. A silicide that contains a metal element contained in the second conductive layer and nitrogen is formed to be in contact with a top surface and a side surface of the second conductive layer. Before etching of the first conductive layer, the silicide is formed by exposing the second conductive layer to an atmosphere containing silane, and plasma treatment is performed in a nitrogen atmosphere without exposure to the air.

First claim

What is claimed is:

1. A semiconductor device comprising:
a semiconductor layer;
a first electrode and a second electrode each in contact with the semiconductor layer;
an insulating layer over the first electrode and the second electrode; and
a third conductive layer over the insulating layer,
wherein the first electrode and the second electrode each comprise:
a first conductive layer in contact with a top surface of the semiconductor layer;
a second conductive layer over the first conductive layer;
a second layer covering a side surface of the second conductive layer; and
a first layer covering a top surface of the second conductive layer and a top surface of the second layer,

wherein the first layer and the second layer each contain silicide containing nitrogen and a metal element contained in the second conductive layer,
wherein the third conductive layer is in contact with the second conductive layer of one of the first electrode and the second electrode through openings of the insulating layer and the first layer, and
wherein a side surface of the first layer, a side surface of the second layer, and a side surface of the first conductive layer are aligned with each other and in contact with the insulating layer.

2. The semiconductor device according to claim 1 , wherein the second conductive layer has higher conductivity than the first conductive layer.

3. The semiconductor device according to claim 1 , wherein the second conductive layer has a lower melting point than the first conductive layer.

4. The semiconductor device according to claim 1 , wherein:
the metal element contained in the second conductive layer is capable of forming the silicide by reacting with silicon.

5. The semiconductor device according to claim 1 , wherein:
the first conductive layer contains titanium or tungsten, and
the metal element contained in the second conductive layer is copper.

6. The semiconductor device according to claim 1 , wherein the semiconductor layer contains a metal oxide.

7. The semiconductor device according to claim 6 , wherein the metal oxide contains at least one of indium, zinc, and gallium.

8. A semiconductor device comprising:
a semiconductor layer;
a first electrode and a second electrode each in contact with the semiconductor layer;
an insulating layer over the first electrode and the second electrode; and
a third conductive layer over the insulating layer,
wherein the first electrode and the second electrode each comprise:
a first conductive layer in contact with a top surface of the semiconductor layer;
a second conductive layer over the first conductive layer;
a second layer covering a side surface of the second conductive layer; and
a first layer covering a top surface of the second conductive layer and a top surface of the second layer,

wherein the first conductive layer contains titanium or tungsten,
wherein the second conductive layer contains copper,
wherein the first layer and the second layer each contains copper silicide nitride,
wherein the third conductive layer is in contact with the second conductive layer of one of the first electrode and the second electrode through openings of the insulating layer and the first layer, and
wherein a side surface of the first layer, a side surface of the second layer, and a side surface of the first conductive layer are aligned with each other and in contact with the insulating layer.

9. The semiconductor device according to claim 8 , wherein the second conductive layer has higher conductivity than the first conductive layer.

10. The semiconductor device according to claim 8 , wherein the semiconductor layer contains a metal oxide.

11. The semiconductor device according to claim 10 , wherein the metal oxide contains at least one of indium, zinc, and gallium.

Assignees

• Semiconductor Energy Lab

Inventors

• Yamazaki Shunpei
• Hamochi Takashi
• Nakazawa Yasutaka
• Jintyou Masami
• Shima Yukinori

Classifications

• H10P14/40

  of conductive or resistive materials · CPC title

• H10D64/0135

  by deposition of a layer, e.g. metal, metal compound or polysilicon, followed by transformation thereof into the insulator · CPC title

• H10W20/40

  Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes · CPC title

• H10D64/0131 Primary

  the additional conductive layer comprising a silicide layer formed by the silicidation reaction between the layer of silicon with a metal layer which is not formed by metal implantation · CPC title

• H10D30/6757

  characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715) · CPC title