Integrated oscillator

Patent metadata

Field	Value
Publication number	US-10903822-B2
Application number	US-201916293518-A
Country	US
Kind code	B2
Filing date	Mar 5, 2019
Priority date	Mar 5, 2019
Publication date	Jan 26, 2021
Grant date	Jan 26, 2021

Abstract

Various implementations described herein refer to an integrated circuit having a first stage and a second stage. The first stage has a step-down converter coupled to an oscillator between a first voltage supply and a second voltage supply. The second stage is coupled to the first stage, and the second stage has a current bias generator coupled to a diode-connected transistor between the first voltage supply and the second voltage supply. The second stage provides an intermediate voltage to the first stage.

First claim

What is claimed is:

1. An integrated circuit, comprising:
a first stage having a step-down converter coupled to an oscillator between a first voltage supply and a second voltage supply, wherein the oscillator comprises a forward body biasing circuit configured to forward body bias one or more transistors of the oscillator; and
a second stage coupled to the first stage, wherein the second stage has a current bias generator coupled to a diode-connected transistor between the first voltage supply and the second voltage supply,
wherein the second stage provides an intermediate voltage to the first stage.

2. An integrated circuit, comprising:
a first stage having a step-down converter coupled to an oscillator between a first voltage supply and a second voltage supply, wherein the oscillator comprises a forward body biasing circuit; and
a second stage coupled to the first stage, wherein the second stage has a current bias generator coupled to a diode-connected transistor between the first voltage supply and the second voltage supply,
wherein the second stage provides an intermediate voltage to the first stage, and wherein the intermediate voltage is used by the oscillator and the forward body biasing circuit to reduce active power of the oscillator while maintaining frequency stability of the oscillator.

3. The integrated circuit of claim 1 , wherein the step-down converter comprises a switched capacitor, and wherein the current bias generator comprises an on-chip current bias generator.

4. The integrated circuit of claim 1 , wherein the second stage is coupled in parallel with the first stage.

5. An integrated circuit, comprising:
a first stage having a step-down converter coupled to an oscillator between a first voltage supply and a second voltage supply, wherein the oscillator comprises a resistor-capacitor (RC) oscillator that operates with low-power and low-frequency, wherein the low-frequency refers to an operating frequency of less than 100 kHz; and
a second stage coupled to the first stage, wherein the second stage has a current bias generator coupled to a diode-connected transistor between the first voltage supply and the second voltage supply,
wherein the second stage provides an intermediate voltage to the first stage.

6. An integrated circuit, comprising:
a first stage having a step-down converter coupled to an oscillator between a first voltage supply and a second voltage supply;
a second stage coupled to the first stage, wherein the second stage has a current bias generator coupled to a diode-connected transistor between the first voltage supply and the second voltage supply, wherein the second stage provides an intermediate voltage to the first stage;
a first pass transistor coupled between the step-down converter and the oscillator, wherein an output of the current bias generator is coupled to a gate of the first pass transistor; and
a second pass transistor coupled between the current bias generator and the diode-connected transistor, wherein an input of the oscillator is coupled to a gate of the second pass transistor.

7. The integrated circuit of claim 6 , wherein:
the step-down converter, the first pass transistor and the oscillator are coupled in series between the first voltage supply and the second voltage supply, and
the current bias generator, the second pass transistor and the diode-connected transistor are coupled in series between the first voltage supply and the second voltage supply.

8. The integrated circuit of claim 6 , further comprising:
a capacitor coupled between a gate of the second pass transistor and the second supply voltage, wherein the capacitor is coupled in parallel with the oscillator between the input of the oscillator and the second voltage supply.

9. The integrated circuit of claim 6 , wherein the first pass transistor and the second pass transistor are n-type transistors.

10. The integrated circuit of claim 1 , wherein the first voltage supply refers to a positive voltage supply that is greater than zero volts (OV), and wherein the second voltage supply refers to ground.

Assignees

• Advanced Risc Mach Ltd

Inventors

• Fan Philex Ming-Yan
• Savanth Parameshwarappa Anand Kumar
• Labbe Benoit
• Sandhu Bal S
• Prabhat Pranay
• Myers James Edward

Classifications

• H02M1/0032

  Control circuits allowing low power mode operation, e.g. in standby mode · CPC title

• H02M3/07 Primary

  using capacitors charged and discharged alternately by semiconductor devices with control electrode {, e.g. charge pumps} · CPC title

• Y02B70/10

  Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes · CPC title

• H03K19/20

  characterised by logic function, e.g. AND, OR, NOR, NOT circuits (H03K19/003 - H03K19/01 take precedence) · CPC title

• H03K3/02315 Primary

  Stabilisation of output, e.g. using crystal · CPC title