Semiconductor device

Patent metadata

Field	Value
Publication number	US-10896891-B2
Application number	US-201916354894-A
Country	US
Kind code	B2
Filing date	Mar 15, 2019
Priority date	Sep 10, 2018
Publication date	Jan 19, 2021
Grant date	Jan 19, 2021

Abstract

A semiconductor device includes: a semiconductor substrate; a plurality of first pad electrodes provided above the semiconductor substrate; a plurality of first wires electrically connected to the plurality of first pad electrodes respectively; a first electrode commonly connected to the plurality of first wires; a second pad electrode provided above the semiconductor substrate; and a first resistance portion and a first protective element that are connected in series between the first electrode and the second pad electrode.

First claim

What is claimed is:

1. A semiconductor device comprising:
a semiconductor substrate;
a plurality of first pad electrodes provided above the semiconductor substrate;
a plurality of first wires electrically connected to the plurality of first pad electrodes respectively;
a first electrode commonly connected to the plurality of first wires;
a second pad electrode provided above the semiconductor substrate;
a first resistance portion and a first protective element that are connected in series between the first electrode and the second pad electrode;
a plurality of second wires electrically connected to the plurality of first pad electrodes respectively;
a second electrode commonly connected to the plurality of second wires;
a third pad electrode provided above the semiconductor substrate; and
a second resistance portion and a second protective element that are connected in series between the second electrode and the third pad electrode.

2. The semiconductor device according to claim 1 , wherein impedances of the plurality of first wires are substantially the same.

3. The semiconductor device according to claim 1 , wherein
impedances of the plurality of first wires are substantially the same, and
impedances of the plurality of second wires are substantially the same.

4. The semiconductor device according to claim 1 , comprising one or more wiring layers, wherein
the one or more wiring layers comprise wiring members and contact members which function as at least one of the plurality of first pad electrodes, the plurality of first wires, the first electrode, the second pad electrode, the first resistance portion and the first protective element.

5. The semiconductor device according to claim 1 , comprising one or more wiring layers, wherein
the one or more wiring layers comprise wiring members and contact members which function as at least one of the plurality of first pad electrodes, the plurality of first wires, the first electrode, the plurality of second wires, the second electrode, the second pad electrode, the third pad electrode, the first resistance portion, the second resistance portion, the first protective element and the second protective element.

6. The semiconductor device according to claim 1 , wherein
the semiconductor substrate comprises an active area, and
the first protective element comprises:
a part of the active area of the semiconductor substrate;
a first insulating film provided on the part of the active area; and
a first lower electrode provided on the first insulating film.

7. The semiconductor device according to claim 1 , wherein
the semiconductor substrate comprises an active area,
the first protective element comprises:
a first part of the active area of the semiconductor substrate;
a first insulating film provided on the first part of the active area; and
a first lower electrode provided on the first insulating film, and
the second protective element comprises:
a second part of the active area of the semiconductor substrate;
a second insulating film provided on the second part of the active area; and
a second lower electrode provided on the second insulating film.

8. The semiconductor device according to claim 1 , wherein
the plurality of first pad electrodes and the second pad electrode are arranged in a first direction, and
at least one of the plurality of first wires comprises:
a plurality of first extending portions extending in the first direction; and
a plurality of second extending portions extending in a second direction which intersects with the first direction.

9. The semiconductor device according to claim 1 , wherein
the plurality of first pad electrodes, the second pad electrode and the third pad electrode are arranged in a first direction,
at least one of the plurality of first wires comprises:
a plurality of first extending portions extending in the first direction; and
a plurality of second extending portions extending in a second direction which intersects with the first direction, and
at least one of the plurality of second wires comprises:
a plurality of third extending portions extending in the first direction; and
a plurality of fourth extending portions extending in the second direction.

10. The semiconductor device according to claim 1 , wherein
the first resistance portion comprises:
a first portion connected to the first electrode;
a second portion connected to the first portion; and
a third portion connected to the second portion,
a wiring width of the second portion is smaller than wiring widths of each of the first portion and the third portion,
the second resistance portion comprises:
a fourth portion connected to the second electrode;
a fifth portion connected to the fourth portion; and
a sixth portion connected to the fifth portion, and
a wiring width of the fifth portion is smaller than wiring widths of each of the fourth portion and the sixth portion.

11. The semiconductor device according to claim 1 , wherein data of a plurality of bits are output in parallel via the plurality of first pad electrodes.

12. The semiconductor device according to claim 1 , being configured such that an electric power can be supplied to the semiconductor device via the second pad electrode.

13. The semiconductor device according to claim 1 , wherein
the plurality of first wires comprises:
an inter-layer wiring portion extending in a thickness direction of the semiconductor substrate; and
an in-layer wiring portion extending in a direction parallel with a surface of the semiconductor substrate.

14. The semiconductor device according to claim 1 , wherein
the plurality of first wires and the plurality of second wires comprises:
an inter-layer wiring portion extending in a thickness direction of the semiconductor substrate; and
an in-layer wiring portion extending in a direction parallel with a surface of the semiconductor substrate.

15. A semiconductor device, comprising:
a semiconductor substrate;
a plurality of first pad electrodes provided above the semiconductor substrate;
a plurality of first wires electrically connected to the plurality of first pad electrodes respectively;
a first electrode commonly connected to the plurality of first wires;
a second pad electrode provided above the semiconductor substrate; and
a first resistance portion and a first protective element that are connected in series between the first electrode and the second pad electrode, wherein
the first resistance portion comprises:
a first portion connected to the first electrode;
a second portion connected to the first portion; and
a third portion connected to the second portion, and
a wiring width of the second portion is smaller than wiring widths of each of the first portion and the third portion.

16. The semiconductor device according to claim 15 , wherein impedances of the plurality of first wires are substantially the same.

17. The semiconductor device according to claim 15 , comprising one or more wiring layers, wherein
the one or more wiring layers comprise wiring members and contact members which function as at least one of the plurality of first pad electrodes, the plurality of first wires, the first electrode, the second pad electrode, the first resistance portion and the first protective element.

18. The semiconductor device according to claim 15 , wherein
the semiconductor substrate comprises an active area, and
the first protective element comprises:
a part of the active area of the semiconductor substrate;
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Assignees

• Toshiba Memory Corp

Inventors

• Suzuki Yu
• Kikuchi Shoko
• Inaba Merii
• Murakami Jun
• Shigeoka Takashi
• Inagaki Hiroshi
• Okuhata Takashi

Classifications

• H10W72/07554

  changes in dispositions · CPC title

• H10W72/547

  Dispositions of multiple bond wires · CPC title

• H10W90/00 Primary

  Package configurations · CPC title

• H10W90/24

  at least one of the stacked chips being laterally offset from a neighbouring stacked chip, e.g. chip stacks having a staircase shape · CPC title

• H10W72/884

  Die-attach connectors and bond wires · CPC title