Method for manufacturing semiconductor device
US-2017018604-A1 · Jan 19, 2017 · US
US10892345B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10892345-B2 |
| Application number | US-201815995049-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 31, 2018 |
| Priority date | Jul 7, 2017 |
| Publication date | Jan 12, 2021 |
| Grant date | Jan 12, 2021 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
Disclosed is a semiconductor device including a bottom electrode, a dielectric layer, and a top electrode that are sequentially disposed on a substrate. The dielectric layer includes a hafnium oxide layer including hafnium oxide having a tetragonal crystal structure, and an oxidation seed layer including an oxidation seed material. The oxidation seed material has a lattice constant having a lattice mismatch of 6% or less with one of a horizontal lattice constant and a vertical lattice constant of the hafnium oxide having the tetragonal crystal structure.
Opening claim text (preview).
What is claimed is: 1. A semiconductor device, comprising: a bottom electrode disposed on a substrate; a top electrode disposed on the bottom electrode; and a conductive seed layer; and a dielectric layer including: a hafnium oxide layer including hafnium oxide having a tetragonal crystal structure having a vertical lattice constant and a horizontal lattice constant; and an oxidation seed layer including an oxidation seed material, wherein the hafnium oxide layer is disposed between the conductive seed layer and the oxidation seed layer, wherein the oxidation seed material has a lattice constant having a lattice mismatch of 6% or less with one of the horizontal lattice constant and the vertical lattice constant of the hafnium oxide, and wherein the conductive seed layer comprises a conductive seed material including a lattice constant having a lattice mismatch of 2% or less with one of the horizontal lattice constant and the vertical lattice constant of the hafnium oxide. 2. The semiconductor device of claim 1 , wherein the oxidation seed material has a band gap energy of 3.0 eV or more. 3. The semiconductor device of claim 1 , wherein the oxidation seed material comprises zirconium oxide, niobium oxide, germanium oxide, tin oxide, molybdenum oxide, or titanium oxide. 4. The semiconductor device of claim 1 , wherein the oxidation seed layer further comprises nitrogen. 5. The semiconductor device of claim 1 , wherein the oxidation seed layer and the hafnium oxide layer are in contact with each other. 6. The semiconductor device of claim 1 , wherein the oxidation seed layer is disposed between the hafnium oxide layer and the top electrode. 7. The semiconductor device of claim 6 , wherein the conductive seed layer is disposed between the bottom electrode and the hafnium oxide layer. 8. The semiconductor device of claim 1 , wherein the oxidation seed layer is disposed between the bottom electrode and the hafnium oxide layer. 9. The semiconductor device of claim 8 , wherein the conductive seed layer is disposed between the hafnium oxide layer and the top electrode. 10. A semiconductor device, comprising: a bottom electrode; a top electrode; a dielectric layer; and a conductive seed layer, wherein the dielectric layer and the conductive seed layer are disposed between the bottom electrode and the top electrode, wherein the dielectric layer comprises: an oxidation seed layer; and a hafnium oxide layer between the oxidation seed layer and the conductive seed layer, wherein the hafnium oxide layer comprises hafnium oxide having a tetragonal crystal structure having a horizontal lattice constant and a vertical lattice constant, wherein the oxidation seed layer comprises an oxidation seed material including a lattice constant having a lattice mismatch of 6% or less with one of the horizontal lattice constant and the vertical lattice constant of the hafnium oxide, and wherein the conductive seed layer comprises a conductive seed material including a lattice constant having a lattice mismatch of 2% or less with one of the horizontal lattice constant and the vertical lattice constant of the hafnium oxide. 11. The semiconductor device of claim 10 , wherein the oxidation seed material has a band gap energy of 3.0 eV or more. 12. The semiconductor device of claim 10 , wherein the oxidation seed material comprises zirconium oxide, niobium oxide, germanium oxide, tin oxide, molybdenum oxide, or titanium oxide. 13. The semiconductor device of claim 10 , wherein the conductive seed material has a band gap energy of 3.5 eV or less. 14. The semiconductor device of claim 10 , wherein the conductive seed material has a work function of 4.7 eV or more. 15. The semiconductor device of claim 10 , wherein the conductive seed material comprises cobalt, nickel, copper, or cobalt nitride. 16. The semiconductor device of claim 10 , further comprising: a sub-oxide layer between the hafnium oxide layer and the conductive seed layer, wherein the sub-oxide layer comprises an oxide of the same metal as that included in the conductive seed layer. 17. The semiconductor device of claim 16 , wherein the sub-oxide layer has a thickness ranging from 5 Å to 10 Å. 18. The semiconductor device of claim 10 , wherein the oxidation seed layer and the hafnium oxide layer are in contact with each other.
comprising multiple local oxidation process steps · CPC title
formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI] · CPC title
Capacitive arrangements (H10W44/20 takes precedence) · CPC title
the dielectrics comprising multiple layers, e.g. comprising buffer layers, seed layers or gradient layers · CPC title
the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.