Information processing device, information processing method, and non-transitory computer readable medium

US10884877B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10884877-B2
Application numberUS-201816150963-A
CountryUS
Kind codeB2
Filing dateOct 3, 2018
Priority dateJun 29, 2018
Publication dateJan 5, 2021
Grant dateJan 5, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present invention provides an information processing device comprising a memory; a non-volatile memory; and a processor coupled to the memory and the non-volatile memory, the processor configured to: store in the non-volatile memory a snapshot of the memory in a state where a part of an activation process is implemented; and implement the activation process by using the snapshot stored in the non-volatile memory. More specifically, store in the non-volatile memory a snapshot of the main memory in a state before feeding a program to the external memory in an activation process using the main memory and the external memory; and implement at least a process of feeding a program for an external memory to the external memory from the main memory.

First claim

Opening claim text (preview).

What is claimed is: 1. An information processing device comprising: a memory; a non-volatile memory; and a processor coupled to the memory and the non-volatile memory, the processor configured to: suspend an activation process in an init_pause state to generate a snapshot of the memory, when it is determined that an activation mode is a snapshot creation mode; store in the non-volatile memory the generated snapshot of the memory in a state where a part of an activation process is implemented; and implement the activation process by using the snapshot stored in the non-volatile memory, when it is determined that the activation mode is a normal activation mode; and release the init_pause state to implement the remaining activation process after using the snapshot stored in the non-volatile memory, wherein suspending the activation process in the init_pause state includes a driver of a radio LAN chip being temporarily suspended immediately before firmware of the radio LAN chip is fed in an initialization process of the driver of the radio LAN chip. 2. The information processing device according to claim 1 , wherein the processor is further configured to implement the remaining activation process after using the snapshot stored in the non-volatile memory. 3. The information processing device according to claim 2 , wherein the processor is further configured to store in the non-volatile memory a snapshot of a state where an activation process using a main memory and an external memory is partly implemented. 4. The information processing device according to claim 3 , wherein the processor is further configured to: store in the non-volatile memory a snapshot of the main memory in a state before feeding a program to the external memory in an activation process using the main memory and the external memory; and implement at least a process of feeding a program for an external memory to the external memory from the main memory. 5. The information processing device according to claim 1 , wherein the processor is further configured to: generate a snapshot of the memory after a language setting of a non-transitory computer readable medium is performed; store the generated snapshot in the non-volatile memory; and implement an activation process remaining after the language setting is performed, based on the snapshot stored in the non-volatile memory.

Assignees

Inventors

Classifications

  • G06F8/63Primary

    Image based installation; Cloning; Build to order · CPC title

  • to make the backup process non-disruptive · CPC title

  • Multiboot arrangements, i.e. selecting an operating system to be loaded · CPC title

  • using techniques specially adapted for alterable solid state memories, e.g. for EEPROM or flash memories · CPC title

  • Bootstrapping (security arrangements therefor G06F21/57) · CPC title

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Frequently asked questions

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What does patent US10884877B2 cover?
The present invention provides an information processing device comprising a memory; a non-volatile memory; and a processor coupled to the memory and the non-volatile memory, the processor configured to: store in the non-volatile memory a snapshot of the memory in a state where a part of an activation process is implemented; and implement the activation process by using the snapshot stored in t…
Who is the assignee on this patent?
Pfu Ltd
What technology area does this patent fall under?
Primary CPC classification G06F8/63. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jan 05 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).