Display panel and display device

US10884304B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10884304-B2
Application numberUS-201816183733-A
CountryUS
Kind codeB2
Filing dateNov 8, 2018
Priority dateDec 19, 2017
Publication dateJan 5, 2021
Grant dateJan 5, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display panel includes a first substrate, a second substrate, a display medium layer, pixel units, and a light-shielding conductive pattern layer. The first substrate has a first inner surface and a first outer surface, and the first outer surface serves as a display surface of the display panel. The second substrate is disposed opposite to the first substrate and has a second inner surface and a second outer surface. The display medium layer is disposed between the first inner surface and the second inner surface. The pixel units are disposed between the display medium layer and the first inner surface, and at least one of the pixel units includes an active element. The light-shielding conductive pattern layer is disposed between the display medium layer and the second inner surface, at least partially overlaps the active element in a vertical projection direction, and includes a first patterned light-shielding conductive layer and a first patterned low-reflection layer. The first patterned light-shielding conductive layer is disposed between the first patterned low-reflection layer and the second substrate.

First claim

Opening claim text (preview).

What is claimed is: 1. A display panel comprising: a first substrate having a first inner surface and a first outer surface, the first outer surface being a display surface of the display panel; a second substrate disposed opposite to the first substrate and having a second inner surface and a second outer surface, wherein the second substrate is disposed below the first substrate; a display medium layer disposed between the first inner surface of the first substrate and the second inner surface of the second substrate; a plurality of pixel units disposed between the display medium layer and the first inner surface of the first substrate, at least one of the plurality of pixel units including at least one active element and at least one pixel electrode, the at least one pixel electrode being electrically connected to the at least one active element; and a light-shielding conductive pattern layer disposed between the display medium layer and the second inner surface of the second substrate and at least partially overlapping the active elements in a vertical projection direction, the light-shielding conductive pattern layer comprising a first patterned light-shielding conductive pattern layer and a first patterned low-reflection layer, and the first patterned light-shielding conductive pattern layer is disposed between the first patterned low-reflection layer and the second inner surface of the second substrate, wherein the first patterned low-reflection layer is near the at least one of the plurality of pixel units on the first inner surface of the first substrate, and the first patterned light-shielding conductive pattern layer is away from the at least one of the plurality of pixel units on the first inner surface of the first substrate, wherein a material of the first patterned low-reflection layer includes aluminum oxide, chromium oxide, copper oxide, molybdenum oxide, aluminum nitride, chromium nitride, copper nitride, molybdenum nitride, molybdenum tantalum alloy oxide, molybdenum titanium alloy oxide, molybdenum tantalum alloy nitride, or molybdenum titanium alloy nitride, wherein the at least one of the plurality of pixel units further comprises: at least two signal lines disposed between the display medium layer and the first inner surface of the first substrate, wherein at least one of the at least two signal lines comprises a second patterned light-shielding conductive layer and a second patterned low-reflection layer, and the second patterned low-reflection layer is located between the second patterned light-shielding conductive layer and the first inner surface of the first substrate wherein the second patterned low-reflection layer is near the first inner surface of the first substrate, and the second patterned light-shielding conductive layer is away from the first inner surface of the first substrate, wherein a material of the second patterned low-reflection layer includes aluminum oxide, chromium oxide, copper oxide, molybdenum oxide, aluminum nitride, chromium nitride, copper nitride, molybdenum nitride, molybdenum tantalum alloy oxide, molybdenum titanium alloy oxide, molybdenum tantalum alloy nitride, or molybdenum titanium alloy nitride, and the at least one active element comprises at least one gate electrode, at least one source electrode, and at least one drain electrode, the at least one gate electrode is electrically connected to one of the at least two signal lines, the at least one source electrode is electrically connected to the other one of the at least two signal lines, and at least one of the at least one gate electrode, the at least one source electrode, and the at least one drain electrode comprises the second patterned light-shielding conductive layer and the second patterned low-reflection layer. 2. The display panel as recited in claim 1 , wherein an optical density of the light-shielding conductive pattern layer is from 5 to 6.5. 3. The display panel as recited in claim 1 , wherein a reflectivity of the first patterned low-reflection layer is from 2% to 20%. 4. The display panel as recited in claim 1 , further comprising: a common electrode layer disposed on the second inner surface of the second substrate and covering the light-shielding conductive pattern layer, the common electrode layer contacting a portion of the first patterned light-shielding conductive layer. 5. The display panel as recited in claim 1 , wherein the light-shielding conductive patterned layer and the at least one of the at least two signal lines are at least partially overlapped in the vertical projection direction. 6. The display panel as recited in claim 1 , wherein the at least one of the at least two signal lines comprises at least one data line, at least one scan line, at least one common line, or at least one power supply line. 7. The display panel as recited in claim 1 , wherein a reflectivity of the second patterned low-reflection layer is from 2% to 20%. 8. A display panel comprising: a first substrate having a first inner surface and a first outer surface, the first outer surface being a display surface of the display panel; a second substrate disposed opposite to the first substrate and having a second inner surface and a second outer surface, wherein the second substrate is disposed below the first substrate; a display medium layer disposed between the first inner surface of the first substrate and the second inner surface of the second substrate; a plurality of pixel units disposed between the display medium layer and the first inner surface of the first substrate, at least one of the plurality of pixel units including at least one active element and at least one pixel electrode, the at least one pixel electrode being electrically connected to the at least one active element; a light-shielding conductive pattern layer disposed between the display medium layer and the second inner surface of the second substrate and at least partially overlapping the active elements in a vertical projection direction, the light-shielding conductive pattern layer comprising a first patterned light-shielding conductive pattern layer and a first patterned low-reflection layer, and the first patterned light-shielding conductive pattern layer is disposed between the first patterned low-reflection layer and the second inner surface of the second substrate, wherein the first patterned low-reflection layer is near the at least one of the plurality of pixel units on the first inner surface of the first substrate, and the first patterned light-shielding conductive pattern layer is away from the at least one of the plurality of pixel units on the first inner surface of the first substrate, wherein a material of the first patterned low-reflection layer includes aluminum oxide, chromium oxide, copper oxide, molybdenum oxide, aluminum nitride, chromium nitride, copper nitride, molybdenum nitride, molybdenum tantalum alloy oxide, molybdenum titanium alloy oxide, molybdenum tantalum alloy nitride, or molybdenum titanium alloy nitride; another light-shielding conductive patterned layer disposed between the active elements and the first inner surface and at least partially overlapping the active elements; and another patterned low-reflection layer stacked onto the another light-shielding conductive pattern layer, wherein the another patterned low-reflection layer is located between the another light-shielding conductive patterned layer and the first inner surface of the first substrate, wherein the another patterned low-reflection layer is away from the active elements, and the another light-shielding conductive patterned layer is near the active elements. 9. The display panel as recited in claim 8 , wherein a reflectivity of the another patterned l

Assignees

Inventors

Classifications

  • having light shields · CPC title

  • wherein the TFTs are in active matrices · CPC title

  • H10D86/441Primary

    Interconnections, e.g. scanning lines · CPC title

  • Colour filters incorporated in the active matrix substrate · CPC title

  • Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element · CPC title

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What does patent US10884304B2 cover?
A display panel includes a first substrate, a second substrate, a display medium layer, pixel units, and a light-shielding conductive pattern layer. The first substrate has a first inner surface and a first outer surface, and the first outer surface serves as a display surface of the display panel. The second substrate is disposed opposite to the first substrate and has a second inner surface a…
Who is the assignee on this patent?
Au Optronics Corp
What technology area does this patent fall under?
Primary CPC classification H10D86/441. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 05 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).